Ville Syrjälä
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e0d8d59b08
drm/i915: Try harder to disable trickle feed on VLV
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12 лет назад |
Rodrigo Vivi
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fd3da6c95b
drm/i915: WA: FBC Render Nuke.
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12 лет назад |
Ville Syrjälä
|
0e088b8f33
drm/i915: Refactor ctg+ trickle feed disable
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12 лет назад |
Ville Syrjälä
|
bdad2b2f31
drm/i915: Disable trickle feed in ironlake_init_clock_gating()
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12 лет назад |
Ville Syrjälä
|
20f949670f
drm/i915: Disable trickle feed via MI_ARB_STATE for the gen4
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12 лет назад |
Ville Syrjälä
|
de1aa629aa
drm/i915: Disable primary plane trickle feed for g4x
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12 лет назад |
Wang Xingchao
|
a38911a3fe
i915/drm: Add private api for power well usage
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12 лет назад |
Paulo Zanoni
|
f85da868e3
drm/i915: update FBC maximum fb sizes
|
12 лет назад |
Ville Syrjälä
|
d7fe0cc0f2
drm/i915: Fix DSPCLK_GATE_D for VLV
|
12 лет назад |
Ville Syrjälä
|
4548feb1fe
drm/i915: VLV doesn't have the ILK+ style LP watermark registers
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12 лет назад |
Daniel Vetter
|
ff9a6750ac
drm/i915: store adjusted dotclock in adjusted_mode->clock
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12 лет назад |
Ben Widawsky
|
4848405cce
drm/i915: make PM interrupt writes non-destructive
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12 лет назад |
Ben Widawsky
|
eda63ffb90
drm/i915: Add PM regs to pre/post install
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12 лет назад |
Paulo Zanoni
|
861f3389c6
drm/i915: add support for 5/6 data buffer partitioning on Haswell
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12 лет назад |
Paulo Zanoni
|
cca32e9ad3
drm/i915: properly set HSW WM_LP watermarks
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12 лет назад |
Paulo Zanoni
|
801bcfffbb
drm/i915: properly set HSW WM_PIPE registers
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12 лет назад |
Paulo Zanoni
|
526682e9fa
drm/i915: add haswell_update_sprite_wm
|
12 лет назад |
Paulo Zanoni
|
4c4ff43a69
drm/i915: add "enable" argument to intel_update_sprite_watermarks
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12 лет назад |
Jani Nikula
|
64936258d7
drm/i915: change VLV IOSF sideband accessors to not return error code
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12 лет назад |
Jani Nikula
|
ae99258f02
drm/i915: rename VLV IOSF sideband functions logically
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12 лет назад |
Jani Nikula
|
59de08136f
drm/i915: group sideband register accessors to a new file
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12 лет назад |
Paulo Zanoni
|
90a8864320
drm/i915: set FORCE_ARB_IDLE_PLANES workaround
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12 лет назад |
Paulo Zanoni
|
3e1f72664e
drm/i915: MCH_SSKPD is a 64 bit register on Haswell
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12 лет назад |
Paulo Zanoni
|
85a02deb4c
drm/i915: set the IPS linetime watermark
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12 лет назад |
Paulo Zanoni
|
eaa591ec52
drm/i915: fix haswell linetime watermarks calculation
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12 лет назад |
Paulo Zanoni
|
7366937312
drm/i915: use the mode->htotal to calculate linetime watermarks
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12 лет назад |
Paulo Zanoni
|
1011d8c437
drm/i915: remove intel_update_linetime_watermarks
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12 лет назад |
Daniel Vetter
|
e1b73cba13
Merge tag 'v3.10-rc2' into drm-intel-next-queued
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12 лет назад |
Paulo Zanoni
|
0a790cdbfc
drm/i915: implement WADPOClockGatingDisable for LPT
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12 лет назад |
Damien Lespiau
|
7dd23ba089
drm/i915: Add missing platform tags to FBC workaround comments
|
12 лет назад |