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@@ -243,13 +243,13 @@ static void ironlake_disable_fbc(struct drm_device *dev)
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I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl);
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if (IS_IVYBRIDGE(dev))
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- /* WaFbcDisableDpfcClockGating */
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+ /* WaFbcDisableDpfcClockGating:ivb */
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I915_WRITE(ILK_DSPCLK_GATE_D,
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I915_READ(ILK_DSPCLK_GATE_D) &
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~ILK_DPFCUNIT_CLOCK_GATE_DISABLE);
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if (IS_HASWELL(dev))
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- /* WaFbcDisableDpfcClockGating */
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+ /* WaFbcDisableDpfcClockGating:hsw */
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I915_WRITE(HSW_CLKGATE_DISABLE_PART_1,
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I915_READ(HSW_CLKGATE_DISABLE_PART_1) &
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~HSW_DPFC_GATING_DISABLE);
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@@ -281,17 +281,17 @@ static void gen7_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
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intel_crtc->plane << IVB_DPFC_CTL_PLANE_SHIFT);
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if (IS_IVYBRIDGE(dev)) {
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- /* WaFbcAsynchFlipDisableFbcQueue */
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+ /* WaFbcAsynchFlipDisableFbcQueue:ivb */
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I915_WRITE(ILK_DISPLAY_CHICKEN1, ILK_FBCQ_DIS);
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- /* WaFbcDisableDpfcClockGating */
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+ /* WaFbcDisableDpfcClockGating:ivb */
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I915_WRITE(ILK_DSPCLK_GATE_D,
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I915_READ(ILK_DSPCLK_GATE_D) |
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ILK_DPFCUNIT_CLOCK_GATE_DISABLE);
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} else {
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- /* WaFbcAsynchFlipDisableFbcQueue */
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+ /* WaFbcAsynchFlipDisableFbcQueue:hsw */
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I915_WRITE(HSW_PIPE_SLICE_CHICKEN_1(intel_crtc->pipe),
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HSW_BYPASS_FBC_QUEUE);
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- /* WaFbcDisableDpfcClockGating */
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+ /* WaFbcDisableDpfcClockGating:hsw */
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I915_WRITE(HSW_CLKGATE_DISABLE_PART_1,
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I915_READ(HSW_CLKGATE_DISABLE_PART_1) |
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HSW_DPFC_GATING_DISABLE);
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