 David Daney
|
0f4ccbc835
MIPS: No branches in delay slots for huge pages in handle_tlbl
|
%!s(int64=13) %!d(string=hai) anos |
 Ralf Baechle
|
d954ffe34a
MIPS: tlbex: Fix build error in R3000 code.
|
%!s(int64=14) %!d(string=hai) anos |
|
David Daney
|
bf28607fbe
MIPS: Close races in TLB modify handlers.
|
%!s(int64=14) %!d(string=hai) anos |
 Jayachandran C
|
efa0f81c11
MIPS: Netlogic: Cache, TLB support and feature overrides for XLR
|
%!s(int64=14) %!d(string=hai) anos |
|
Ralf Baechle
|
4a9040f451
MIPS: tlbex: Fix GCC 4.6.0 build error
|
%!s(int64=14) %!d(string=hai) anos |
 Lucas De Marchi
|
25985edced
Fix common misspellings
|
%!s(int64=14) %!d(string=hai) anos |
 David Daney
|
e1c87d2a55
MIPS: Add an unreachable return statement to satisfy buggy GCCs.
|
%!s(int64=14) %!d(string=hai) anos |
|
David Daney
|
2c8c53e28f
MIPS: Optimize TLB handlers for Octeon CPUs
|
%!s(int64=14) %!d(string=hai) anos |
|
David Daney
|
cc33ae4379
MIPS: Use BBIT instructions in TLB handlers
|
%!s(int64=14) %!d(string=hai) anos |
|
David Daney
|
3d8bfdd030
MIPS: Use C0_KScratch (if present) to hold PGD pointer.
|
%!s(int64=14) %!d(string=hai) anos |
 Kevin Cernekee
|
602977b0d6
MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code
|
%!s(int64=14) %!d(string=hai) anos |
 Lars-Peter Clausen
|
83ccf69d8f
MIPS: JZ4740: Add base support for Ingenic JZ4740 System-on-a-Chip
|
%!s(int64=15) %!d(string=hai) anos |
|
David Daney
|
1ec56329ff
MIPS: Check for accesses beyond the end of the PGD.
|
%!s(int64=15) %!d(string=hai) anos |
|
David Daney
|
3be6022c27
MIPS: Use uasm_i_ds{r,l}l_safe() instead of uasm_i_ds{r,l}l() in tlbex.c
|
%!s(int64=15) %!d(string=hai) anos |
|
Ralf Baechle
|
3d45285dd1
MIPS: Sibyte: Fix M3 TLB exception handler workaround.
|
%!s(int64=15) %!d(string=hai) anos |
|
David Daney
|
6dd9344cfc
MIPS: Implement Read Inhibit/eXecute Inhibit
|
%!s(int64=15) %!d(string=hai) anos |
|
David Daney
|
9b8c38917b
MIPS: Use 64-bit stores to c0_entrylo on 64-bit kernels.
|
%!s(int64=15) %!d(string=hai) anos |
 Florian Fainelli
|
3482d713a9
MIPS: Move arch/mips/mm/uasm.h to arch/mips/include/asm/uasm.h
|
%!s(int64=15) %!d(string=hai) anos |
|
David Daney
|
325f8a0a31
MIPS: Two-level pagetables for 64-bit kernels with 64KB pages.
|
%!s(int64=15) %!d(string=hai) anos |
|
David Daney
|
abbdc3d88a
MIPS: Cleanup forgotten label_module_alloc in tlbex.c
|
%!s(int64=15) %!d(string=hai) anos |
|
David Daney
|
82622284dd
MIPS: Put PGD in C0_CONTEXT for 64-bit R2 processors.
|
%!s(int64=15) %!d(string=hai) anos |
 Maxime Bizon
|
0de663ef86
MIPS: BCM63xx: Add Broadcom 63xx CPU definitions.
|
%!s(int64=16) %!d(string=hai) anos |
 Wu Fei
|
e0cc87f594
MIPS: Shrink the size of tlb handler
|
%!s(int64=16) %!d(string=hai) anos |
|
Ralf Baechle
|
631330f584
MIPS: Build fix - include <linux/smp.h> into all smp_processor_id() users.
|
%!s(int64=16) %!d(string=hai) anos |
|
David Daney
|
fd062c847a
MIPS: TLB support for hugetlbfs.
|
%!s(int64=16) %!d(string=hai) anos |
|
David Daney
|
bd1437e49d
MIPS: Remove unused parameters from iPTE_LW.
|
%!s(int64=16) %!d(string=hai) anos |
|
David Daney
|
faed5288af
MIPS: Remove dead case label.
|
%!s(int64=16) %!d(string=hai) anos |
|
David Daney
|
41f0e4d041
MIPS: Allow R2 CPUs to turn off generation of 'ehb' instructions.
|
%!s(int64=16) %!d(string=hai) anos |
|
David Daney
|
95affdda9b
MIPS: Fold the TLB refill at the vmalloc path if possible.
|
%!s(int64=16) %!d(string=hai) anos |
|
David Daney
|
e6f72d3aba
MIPS: Replace some magic numbers with symbolic values in tlbex.c
|
%!s(int64=16) %!d(string=hai) anos |
