 Ralf Baechle
|
3d45285dd1
MIPS: Sibyte: Fix M3 TLB exception handler workaround.
|
15 years ago |
 David Daney
|
6dd9344cfc
MIPS: Implement Read Inhibit/eXecute Inhibit
|
15 years ago |
|
David Daney
|
9b8c38917b
MIPS: Use 64-bit stores to c0_entrylo on 64-bit kernels.
|
15 years ago |
 Florian Fainelli
|
3482d713a9
MIPS: Move arch/mips/mm/uasm.h to arch/mips/include/asm/uasm.h
|
15 years ago |
|
David Daney
|
325f8a0a31
MIPS: Two-level pagetables for 64-bit kernels with 64KB pages.
|
15 years ago |
|
David Daney
|
abbdc3d88a
MIPS: Cleanup forgotten label_module_alloc in tlbex.c
|
15 years ago |
|
David Daney
|
82622284dd
MIPS: Put PGD in C0_CONTEXT for 64-bit R2 processors.
|
15 years ago |
 Maxime Bizon
|
0de663ef86
MIPS: BCM63xx: Add Broadcom 63xx CPU definitions.
|
16 years ago |
 Wu Fei
|
e0cc87f594
MIPS: Shrink the size of tlb handler
|
16 years ago |
|
Ralf Baechle
|
631330f584
MIPS: Build fix - include <linux/smp.h> into all smp_processor_id() users.
|
16 years ago |
|
David Daney
|
fd062c847a
MIPS: TLB support for hugetlbfs.
|
16 years ago |
|
David Daney
|
bd1437e49d
MIPS: Remove unused parameters from iPTE_LW.
|
16 years ago |
|
David Daney
|
faed5288af
MIPS: Remove dead case label.
|
16 years ago |
|
David Daney
|
41f0e4d041
MIPS: Allow R2 CPUs to turn off generation of 'ehb' instructions.
|
16 years ago |
|
David Daney
|
95affdda9b
MIPS: Fold the TLB refill at the vmalloc path if possible.
|
16 years ago |
|
David Daney
|
e6f72d3aba
MIPS: Replace some magic numbers with symbolic values in tlbex.c
|
16 years ago |
 Manuel Lauss
|
2f794d099d
MIPS: Alchemy: MIPS hazard workarounds are not required.
|
16 years ago |
|
Manuel Lauss
|
270717a8a0
MIPS: Alchemy: unify CPU model constants.
|
16 years ago |
 Shinya Kuribayashi
|
a644b2774d
MIPS: NEC VR5500 processor support fixup
|
16 years ago |
|
David Daney
|
ec454d8c4f
MIPS: Add Cavium OCTEON slot into proper tlb category.
|
16 years ago |
 Thomas Bogendoerfer
|
e0cee3eea7
[MIPS] Fix WARNING: at kernel/smp.c:290
|
17 years ago |
|
Thomas Bogendoerfer
|
326e2e1a59
[MIPS] R4700: Fix build_tlb_probe_entry
|
17 years ago |
|
Thomas Bogendoerfer
|
b1ec4c8e48
[MIPS] Add missing 4KEC TLB refill handler
|
17 years ago |
|
Ralf Baechle
|
234fcd1484
[MIPS] Fix loads of section missmatches
|
17 years ago |
 Thiemo Seufer
|
e30ec4525d
[MIPS] Split the micro-assembler from tlbex.c.
|
17 years ago |
|
Manuel Lauss
|
237cfee1db
[MIPS] Alchemy: Au1210/Au1250 CPU support
|
17 years ago |
 Franck Bui-Huu
|
92b1e6a64a
[MIPS] tlbex.c: cleanup debug code
|
17 years ago |
|
Franck Bui-Huu
|
cbdbe07f9d
[MIPS] tlbex.c: use __cacheline_aligned instead of __tlb_handler_align
|
17 years ago |
|
Franck Bui-Huu
|
f49b94d8c1
[MIPS] tlbex.c: cleanup include files
|
17 years ago |
|
Franck Bui-Huu
|
a9af6041e9
[MIPS] tlbex.c: Cleanup __init usages.
|
17 years ago |
