 Ben Skeggs
|
77145f1cbd
drm/nouveau: port remainder of drm code, and rip out compat layer
|
13 years ago |
|
Ben Skeggs
|
861d21074b
drm/nouveau/fb: merge fb/vram and port to subdev interfaces
|
13 years ago |
|
Ben Skeggs
|
70790f4f81
drm/nouveau/clock: pull in the implementation from all over the place
|
13 years ago |
|
Ben Skeggs
|
02a841d434
drm/nouveau: restructure source tree, split core from drm implementation
|
13 years ago |
 Maarten Lankhorst
|
44b9f44e11
nouveau: fixup scanout enable in nvc0_pm
|
13 years ago |
|
Ben Skeggs
|
9d6ba0b58c
drm/nvc0/pm: very initial mclk freq change
|
13 years ago |
|
Ben Skeggs
|
6b91d6b056
drm/nvc0/pm: enable mpll src pll, and calc mpll coefficients
|
13 years ago |
|
Ben Skeggs
|
a1da205f42
drm/nvc0/pm: start filling in memory reclocking stubs
|
13 years ago |
|
Ben Skeggs
|
1ae73f2f16
drm/nvc0/pm: restrict pll mode to clocks that can actually use it
|
13 years ago |
|
Ben Skeggs
|
045da4e555
drm/nvc0/pm: initial engine reclocking
|
13 years ago |
|
Ben Skeggs
|
8ce51fcfee
drm/nvc0/pm: minor clock readback fixes
|
14 years ago |
|
Ben Skeggs
|
9698b9a680
drm/nvc0/pm: more complete parsing of clock domains
|
14 years ago |
|
Ben Skeggs
|
354d0781e5
drm/nvc0/pm: initial implementation of clocks_get()
|
14 years ago |
