 Ralf Baechle
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69f24d1784
MIPS: Optimize current_cpu_type() for better code.
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11 years ago |
|
Ralf Baechle
|
cf5b2d23a7
MIPS: oprofile: Fix BUG due to smp_processor_id() in preemptible code.
|
12 years ago |
 Tony Wu
|
fc192e50f8
MIPS: Cleanup indentation and whitespace
|
12 years ago |
 David Daney
|
3ddc14add5
MIPS: Only set cpu_has_mmips if SYS_SUPPORTS_MICROMIPS
|
12 years ago |
|
Ralf Baechle
|
1990e5429c
MIPS: Get rid of MIPS I flag and test macros.
|
12 years ago |
 Huacai Chen
|
8759934e2b
MIPS: Build uasm-generated code only once to avoid CPU Hotplug problem
|
12 years ago |
|
Ralf Baechle
|
8bfc245f9a
Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next
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12 years ago |
|
David Daney
|
1e7decdb27
MIPS: Probe for and report hardware virtualization support.
|
12 years ago |
 Steven J. Hill
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f8fa4811db
MIPS: Add support for the M14KEc core.
|
12 years ago |
|
Steven J. Hill
|
a96102be70
MIPS: Add printing of ISA version in cpuinfo.
|
12 years ago |
|
Ralf Baechle
|
7034228792
MIPS: Whitespace cleanup.
|
12 years ago |
|
Steven J. Hill
|
ee80f7c73d
MIPS: Add detection of DSP ASE Revision 2.
|
13 years ago |
 Al Cooper
|
da4b62cd67
MIPS: perf: Add cpu feature bit for PCI (performance counter interrupt)
|
13 years ago |
|
Steven J. Hill
|
05857c64ec
MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'.
|
12 years ago |
|
Steven J. Hill
|
b2ab4f08e8
MIPS: Add base architecture support for RI and XI.
|
12 years ago |
|
Ralf Baechle
|
417a5eb02c
MIPS: Update comment for cpu_has_clo_clz
|
15 years ago |
 David Daney
|
6dd9344cfc
MIPS: Implement Read Inhibit/eXecute Inhibit
|
15 years ago |
 Guenter Roeck
|
91dfc423cc
MIPS: 64-bit: Detect virtual memory size
|
15 years ago |
|
David Daney
|
b791d1193a
MIPS: Allow kernel use of LL/SC to be separate from the presence of LL/SC.
|
16 years ago |
|
David Daney
|
fbeda19f82
MIPS: Allow CPU specific overriding of CP0 hwrena impl bits.
|
16 years ago |
|
David Daney
|
41f0e4d041
MIPS: Allow R2 CPUs to turn off generation of 'ehb' instructions.
|
16 years ago |
|
Ralf Baechle
|
47740eb887
MIPS: Enable CLO / CLZ instructions via separate CPU property
|
16 years ago |
|
David Daney
|
47d979eca3
MIPS: Hook Cavium OCTEON cache init into cache.c
|
16 years ago |
|
Ralf Baechle
|
c46b302b94
MIPS: New feature test macro cpu_has_mips_r
|
16 years ago |
|
Ralf Baechle
|
384740dc49
MIPS: Move headfiles to new location below arch/mips/include
|
17 years ago |
