 Jesse Barnes
|
645c62a5e9
drm/i915: split PCH clock gating init
|
14 years ago |
|
Jesse Barnes
|
28963a3eb5
drm/i915: add Ivybridge clock gating init function
|
14 years ago |
 Eric Anholt
|
4593010b68
drm/i915: Update the location of the ringbuffers' HWS_PGA registers for IVB.
|
14 years ago |
|
Jesse Barnes
|
b1f14ad01a
drm/i915: interrupt & vblank support for Ivy Bridge
|
14 years ago |
|
Jesse Barnes
|
357555c00f
drm/i915: manual FDI training for Ivy Bridge
|
14 years ago |
 Ben Widawsky
|
4912d04193
drm/i915: move gen6 rps handling to workqueue
|
14 years ago |
 Dave Airlie
|
38f1cff086
Merge commit '5359533801e3dd3abca5b7d3d985b0b33fd9fe8b' into drm-core-next
|
14 years ago |
 Takashi Iwai
|
ba3820ade3
drm/i915: Revive combination mode for backlight control
|
14 years ago |
 Chris Wilson
|
47ae63e0c2
Merge branch 'drm-intel-fixes' into drm-intel-next
|
14 years ago |
|
Chris Wilson
|
9135583464
drm/i915: Do not overflow the MMADDR write FIFO
|
14 years ago |
|
Chris Wilson
|
8692d00e99
drm/i915: Replace vblank PM QoS with "Interrupt-Based AGPBUSY#"
|
14 years ago |
|
Chris Wilson
|
710f957846
Merge branch 'drm-intel-fixes' into drm-intel-next
|
14 years ago |
|
Chris Wilson
|
e953fd7bb3
drm/i915: Add support for limited color range of broadcast outputs
|
14 years ago |
 Indan Zupancic
|
951f3512db
drm/i915: Do not handle backlight combination mode specially
|
14 years ago |
|
Chris Wilson
|
9035a97a32
Merge branch 'drm-intel-fixes' into drm-intel-next
|
14 years ago |
|
Jesse Barnes
|
47a05eca72
drm/i915: disable PCH ports if needed when disabling a CRTC
|
14 years ago |
|
Jesse Barnes
|
9db4a9c7b2
drm/i915: cleanup per-pipe reg usage
|
14 years ago |
|
Eric Anholt
|
cb3543c6b1
drm/i915: Set the transcoder port to none when disabling DP.
|
14 years ago |
|
Chris Wilson
|
71a77e07d0
drm/i915: Invalidate TLB caches on SNB BLT/BSD rings
|
14 years ago |
|
Chris Wilson
|
fe4402931e
Merge branch 'drm-intel-fixes' into drm-intel-next
|
14 years ago |
 Bryan Freed
|
aa9b500ddf
drm/i915: Honour LVDS sync polarity from EDID
|
14 years ago |
|
Jesse Barnes
|
ccab5c8275
drm/i915: tune Sandy Bridge DRPS constants
|
14 years ago |
|
Jesse Barnes
|
6f06ce184c
drm/i915: set phase sync pointer override enable before setting phase sync pointer
|
14 years ago |
|
Jesse Barnes
|
92f2584a08
drm/i915: add PCH DPLL enable/disable functions
|
14 years ago |
|
Jesse Barnes
|
b24e717988
drm/i915: add pipe/plane enable/disable functions
|
14 years ago |
|
Jesse Barnes
|
4efe070896
drm/i915: make the blitter report buffer modifications to the FBC unit
|
14 years ago |
|
Jesse Barnes
|
1ffa325bac
drm/i915: set more FBC chicken bits
|
14 years ago |
|
Jesse Barnes
|
776ad8062b
drm/i915: detect & report PCH display error interrupts
|
14 years ago |
|
Jesse Barnes
|
88271da3f3
drm/i915: re-enable rc6 support for Ironlake+
|
14 years ago |
|
Chris Wilson
|
0f46832fab
drm/i915: Mask USER interrupts on gen6 (until required)
|
14 years ago |
