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@@ -14,22 +14,23 @@ struct intel_hw_status_page {
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struct drm_i915_gem_object *obj;
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};
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-#define I915_RING_READ(reg) i915_safe_read(dev_priv, reg)
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+#define I915_RING_READ(reg) i915_gt_read(dev_priv, reg)
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+#define I915_RING_WRITE(reg, val) i915_gt_write(dev_priv, reg, val)
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#define I915_READ_TAIL(ring) I915_RING_READ(RING_TAIL((ring)->mmio_base))
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-#define I915_WRITE_TAIL(ring, val) I915_WRITE(RING_TAIL((ring)->mmio_base), val)
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+#define I915_WRITE_TAIL(ring, val) I915_RING_WRITE(RING_TAIL((ring)->mmio_base), val)
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#define I915_READ_START(ring) I915_RING_READ(RING_START((ring)->mmio_base))
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-#define I915_WRITE_START(ring, val) I915_WRITE(RING_START((ring)->mmio_base), val)
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+#define I915_WRITE_START(ring, val) I915_RING_WRITE(RING_START((ring)->mmio_base), val)
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#define I915_READ_HEAD(ring) I915_RING_READ(RING_HEAD((ring)->mmio_base))
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-#define I915_WRITE_HEAD(ring, val) I915_WRITE(RING_HEAD((ring)->mmio_base), val)
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+#define I915_WRITE_HEAD(ring, val) I915_RING_WRITE(RING_HEAD((ring)->mmio_base), val)
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#define I915_READ_CTL(ring) I915_RING_READ(RING_CTL((ring)->mmio_base))
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-#define I915_WRITE_CTL(ring, val) I915_WRITE(RING_CTL((ring)->mmio_base), val)
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+#define I915_WRITE_CTL(ring, val) I915_RING_WRITE(RING_CTL((ring)->mmio_base), val)
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-#define I915_WRITE_IMR(ring, val) I915_WRITE(RING_IMR((ring)->mmio_base), val)
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#define I915_READ_IMR(ring) I915_RING_READ(RING_IMR((ring)->mmio_base))
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+#define I915_WRITE_IMR(ring, val) I915_RING_WRITE(RING_IMR((ring)->mmio_base), val)
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#define I915_READ_NOPID(ring) I915_RING_READ(RING_NOPID((ring)->mmio_base))
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#define I915_READ_SYNC_0(ring) I915_RING_READ(RING_SYNC_0((ring)->mmio_base))
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