 Ralf Baechle
|
10cc352907
[MIPS] Allow hardwiring of the CPU type to a single type for optimization.
|
17 anni fa |
 Maciej W. Rozycki
|
1ac74d528d
[MIPS] pg-r4k.c: Dump the generated code
|
17 anni fa |
|
Maciej W. Rozycki
|
f6a9e6dec5
[MIPS] pg-r4k.c: Fix a typo in an R4600 v2 erratum workaround
|
17 anni fa |
 Atsushi Nemoto
|
33b06b513e
[MIPS] TX49: Fix use of CDEX build_store_reg()
|
18 anni fa |
|
Ralf Baechle
|
242954b5aa
[MIPS] 16K & 64K page size fixes
|
18 anni fa |
 Kumba
|
44d921b246
[MIPS] Treat R14000 like R10000.
|
19 anni fa |
|
Atsushi Nemoto
|
de862b488e
[MIPS] TX49XX has prefetch.
|
19 anni fa |
 Thiemo Seufer
|
10a3dabddd
Add/Fix missing bit of R4600 hit cacheop workaround.
|
20 anni fa |
|
Thiemo Seufer
|
330cfe016b
Let r4600 PRID detection match only legacy CPUs, cleanups.
|
20 anni fa |
|
Ralf Baechle
|
1d40cfcd34
Avoid SMP cacheflushes. This is a minor optimization of startup but
|
20 anni fa |
 Linus Torvalds
|
1da177e4c3
Linux-2.6.12-rc2
|
20 anni fa |
