Avinash H.M
|
5fd2a84ab3
OMAP3: set the core dpll clk rate in its set_rate function
|
14 年之前 |
Paul Walmsley
|
657ebfadc1
OMAP3/4 clock: split into per-chip family files
|
15 年之前 |
Paul Walmsley
|
35e424e2c0
OMAP3 clock: split out DPLL3 M2 divider functions into mach-omap2/clkt34xx_dpll3m2.c
|
15 年之前 |