 Takashi Iwai
|
ba3820ade3
drm/i915: Revive combination mode for backlight control
|
14 years ago |
 Chris Wilson
|
9135583464
drm/i915: Do not overflow the MMADDR write FIFO
|
14 years ago |
 Indan Zupancic
|
951f3512db
drm/i915: Do not handle backlight combination mode specially
|
14 years ago |
|
Chris Wilson
|
71a77e07d0
drm/i915: Invalidate TLB caches on SNB BLT/BSD rings
|
14 years ago |
 Jesse Barnes
|
4efe070896
drm/i915: make the blitter report buffer modifications to the FBC unit
|
14 years ago |
|
Jesse Barnes
|
1ffa325bac
drm/i915: set more FBC chicken bits
|
14 years ago |
|
Jesse Barnes
|
776ad8062b
drm/i915: detect & report PCH display error interrupts
|
14 years ago |
|
Jesse Barnes
|
88271da3f3
drm/i915: re-enable rc6 support for Ironlake+
|
14 years ago |
|
Chris Wilson
|
0f46832fab
drm/i915: Mask USER interrupts on gen6 (until required)
|
14 years ago |
|
Jesse Barnes
|
b79d499022
drm/i915: support low power watermarks on Ironlake
|
14 years ago |
|
Jesse Barnes
|
a6044e23b7
drm/i915: support overclocking on Sandy Bridge
|
14 years ago |
 Yuanhan Liu
|
3c5a62b522
drm/i915: fix calculation of eDP signal levels on Sandybridge
|
14 years ago |
 Dave Airlie
|
4f125010d2
Merge branch 'master' of /home/airlied/kernel/linux-2.6 into drm-core-next
|
14 years ago |
|
Chris Wilson
|
4d3024428f
drm/i915: Verify Ironlake eDP presence on DP_A using the capability fuse
|
14 years ago |
 Eric Anholt
|
06f37751af
drm/i915: Set the required VFMUNIT clock gating disable on Ironlake.
|
14 years ago |
|
Jesse Barnes
|
3b8d8d91d5
drm/i915: dynamic render p-state support for Sandy Bridge
|
14 years ago |
 Mario Kleiner
|
0af7e4dff5
drm/i915: Add support for precise vblank timestamping (v2)
|
14 years ago |
|
Yuanhan Liu
|
9c04f015eb
drm/i915: Add frame buffer compression on Sandybridge
|
14 years ago |
|
Yuanhan Liu
|
1398261a2e
drm/i915: Add self-refresh support on Sandybridge
|
14 years ago |
|
Chris Wilson
|
8fd2685911
drm/i915: Enable RC6 autodownclocking on Sandybridge
|
14 years ago |
|
Chris Wilson
|
eb43f4af7e
drm/i915: Terminate the FORCE WAKE after we have finished reading
|
14 years ago |
|
Chris Wilson
|
1ec14ad313
drm/i915: Implement GPU semaphores for inter-ring synchronisation on SNB
|
14 years ago |
|
Chris Wilson
|
c1858123db
drm/i915: Enable CB tuning of the Display PLL
|
14 years ago |
|
Chris Wilson
|
b9e68670cc
Merge branch 'drm-intel-fixes' into drm-intel-next
|
14 years ago |
|
Eric Anholt
|
220cad3cbf
drm/i915: Always set the DP transcoder config to 8BPC.
|
14 years ago |
 Daniel Vetter
|
c6642782b9
drm/i915: Add a mechanism for pipelining fence register updates
|
14 years ago |
|
Eric Anholt
|
cff458c210
drm/i915: Add support for GPU reset on gen6.
|
14 years ago |
|
Chris Wilson
|
c4a1d9e4dc
drm/i915: Capture interesting display registers on error
|
14 years ago |
|
Chris Wilson
|
8168bd48bb
drm/i915: Remove the definitions for Primary Ring Buffer
|
14 years ago |
 Zou Nan hai
|
cae5852dca
drm/i915/ringbuffer: set FORCE_WAKE bit before reading ring register
|
14 years ago |
