 Ralf Baechle
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359187d647
MIPS: R5000: Fix TLB hazard handling.
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12 years ago |
|
Ralf Baechle
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02a5417751
MIPS: tlbex: Deal with re-definition of label
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12 years ago |
 David Daney
|
748e787eb6
MIPS: Optimize TLB refill for RI/XI configurations.
|
13 years ago |
|
Ralf Baechle
|
cb418b34ca
Merge branch 'ralf-3.7' of git://git.linux-mips.org/pub/scm/sjhill/linux-sjhill into mips-for-linux-next
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12 years ago |
 Steven J. Hill
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05857c64ec
MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'.
|
12 years ago |
|
Steven J. Hill
|
ff401e5210
MIPS: Optimise TLB handlers for MIPS32/64 R2 cores.
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13 years ago |
|
Steven J. Hill
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625c0a2170
MIPS: Avoid pipeline stalls on some MIPS32R2 cores.
|
13 years ago |
|
Steven J. Hill
|
113c62d984
MIPS: Add support for the M14Kc core.
|
13 years ago |
 David Howells
|
b81947c646
Disintegrate asm/system.h for MIPS
|
13 years ago |
 David Daney
|
0f4ccbc835
MIPS: No branches in delay slots for huge pages in handle_tlbl
|
14 years ago |
|
Ralf Baechle
|
d954ffe34a
MIPS: tlbex: Fix build error in R3000 code.
|
14 years ago |
|
David Daney
|
bf28607fbe
MIPS: Close races in TLB modify handlers.
|
14 years ago |
 Jayachandran C
|
efa0f81c11
MIPS: Netlogic: Cache, TLB support and feature overrides for XLR
|
14 years ago |
|
Ralf Baechle
|
4a9040f451
MIPS: tlbex: Fix GCC 4.6.0 build error
|
14 years ago |
 Lucas De Marchi
|
25985edced
Fix common misspellings
|
14 years ago |
|
David Daney
|
e1c87d2a55
MIPS: Add an unreachable return statement to satisfy buggy GCCs.
|
14 years ago |
|
David Daney
|
2c8c53e28f
MIPS: Optimize TLB handlers for Octeon CPUs
|
14 years ago |
|
David Daney
|
cc33ae4379
MIPS: Use BBIT instructions in TLB handlers
|
14 years ago |
|
David Daney
|
3d8bfdd030
MIPS: Use C0_KScratch (if present) to hold PGD pointer.
|
14 years ago |
 Kevin Cernekee
|
602977b0d6
MIPS: Decouple BMIPS CPU support from bcm47xx/bcm63xx SoC code
|
14 years ago |
 Lars-Peter Clausen
|
83ccf69d8f
MIPS: JZ4740: Add base support for Ingenic JZ4740 System-on-a-Chip
|
15 years ago |
|
David Daney
|
1ec56329ff
MIPS: Check for accesses beyond the end of the PGD.
|
15 years ago |
|
David Daney
|
3be6022c27
MIPS: Use uasm_i_ds{r,l}l_safe() instead of uasm_i_ds{r,l}l() in tlbex.c
|
15 years ago |
|
Ralf Baechle
|
3d45285dd1
MIPS: Sibyte: Fix M3 TLB exception handler workaround.
|
15 years ago |
|
David Daney
|
6dd9344cfc
MIPS: Implement Read Inhibit/eXecute Inhibit
|
15 years ago |
|
David Daney
|
9b8c38917b
MIPS: Use 64-bit stores to c0_entrylo on 64-bit kernels.
|
15 years ago |
 Florian Fainelli
|
3482d713a9
MIPS: Move arch/mips/mm/uasm.h to arch/mips/include/asm/uasm.h
|
15 years ago |
|
David Daney
|
325f8a0a31
MIPS: Two-level pagetables for 64-bit kernels with 64KB pages.
|
15 years ago |
|
David Daney
|
abbdc3d88a
MIPS: Cleanup forgotten label_module_alloc in tlbex.c
|
15 years ago |
|
David Daney
|
82622284dd
MIPS: Put PGD in C0_CONTEXT for 64-bit R2 processors.
|
15 years ago |
