瀏覽代碼

[MIPS] SMTC: Move MIPS_CPU_IPI_IRQ definition into header.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Ralf Baechle 18 年之前
父節點
當前提交
fe56b954ea
共有 2 個文件被更改,包括 10 次插入2 次删除
  1. 0 2
      arch/mips/kernel/smtc.c
  2. 10 0
      include/asm-mips/smtc.h

+ 0 - 2
arch/mips/kernel/smtc.c

@@ -28,8 +28,6 @@
  * This file should be built into the kernel only if CONFIG_MIPS_MT_SMTC is set.
  * This file should be built into the kernel only if CONFIG_MIPS_MT_SMTC is set.
  */
  */
 
 
-#define MIPS_CPU_IPI_IRQ	1
-
 #define LOCK_MT_PRA() \
 #define LOCK_MT_PRA() \
 	local_irq_save(flags); \
 	local_irq_save(flags); \
 	mtflags = dmt()
 	mtflags = dmt()

+ 10 - 0
include/asm-mips/smtc.h

@@ -55,4 +55,14 @@ extern void smtc_boot_secondary(int cpu, struct task_struct *t);
 
 
 #define PARKED_INDEX	((unsigned int)0x80000000)
 #define PARKED_INDEX	((unsigned int)0x80000000)
 
 
+/*
+ * Define low-level interrupt mask for IPIs, if necessary.
+ * By default, use SW interrupt 1, which requires no external
+ * hardware support, but which works only for single-core
+ * MIPS MT systems.
+ */
+#ifndef MIPS_CPU_IPI_IRQ
+#define MIPS_CPU_IPI_IRQ 1
+#endif
+
 #endif /*  _ASM_SMTC_MT_H */
 #endif /*  _ASM_SMTC_MT_H */