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@@ -55,4 +55,14 @@ extern void smtc_boot_secondary(int cpu, struct task_struct *t);
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#define PARKED_INDEX ((unsigned int)0x80000000)
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+/*
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+ * Define low-level interrupt mask for IPIs, if necessary.
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+ * By default, use SW interrupt 1, which requires no external
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+ * hardware support, but which works only for single-core
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+ * MIPS MT systems.
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+ */
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+#ifndef MIPS_CPU_IPI_IRQ
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+#define MIPS_CPU_IPI_IRQ 1
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+#endif
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+
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#endif /* _ASM_SMTC_MT_H */
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