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+/*
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+ * Synopsys DesignWare I2C adapter driver (master only).
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+ *
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+ * Based on the TI DAVINCI I2C adapter driver.
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+ *
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+ * Copyright (C) 2006 Texas Instruments.
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+ * Copyright (C) 2007 MontaVista Software Inc.
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+ * Copyright (C) 2009 Provigent Ltd.
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+ * Copyright (C) 2011 Intel corporation.
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+ *
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+ * ----------------------------------------------------------------------------
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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+ * ----------------------------------------------------------------------------
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+ *
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/delay.h>
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+#include <linux/i2c.h>
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+#include <linux/errno.h>
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+#include <linux/sched.h>
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+#include <linux/err.h>
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+#include <linux/interrupt.h>
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+#include <linux/io.h>
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+#include <linux/slab.h>
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+#include <linux/pci.h>
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+#include "i2c-designware-core.h"
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+
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+#define DRIVER_NAME "i2c-designware-pci"
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+
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+enum dw_pci_ctl_id_t {
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+ moorestown_0,
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+ moorestown_1,
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+ moorestown_2,
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+
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+ medfield_0,
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+ medfield_1,
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+ medfield_2,
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+ medfield_3,
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+ medfield_4,
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+ medfield_5,
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+};
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+
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+struct dw_pci_controller {
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+ u32 bus_num;
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+ u32 bus_cfg;
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+ u32 tx_fifo_depth;
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+ u32 rx_fifo_depth;
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+ u32 clk_khz;
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+};
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+
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+#define INTEL_MID_STD_CFG (DW_IC_CON_MASTER | \
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+ DW_IC_CON_SLAVE_DISABLE | \
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+ DW_IC_CON_RESTART_EN)
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+
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+static struct dw_pci_controller dw_pci_controllers[] = {
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+ [moorestown_0] = {
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+ .bus_num = 0,
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+ .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
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+ .tx_fifo_depth = 32,
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+ .rx_fifo_depth = 32,
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+ .clk_khz = 25000,
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+ },
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+ [moorestown_1] = {
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+ .bus_num = 1,
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+ .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
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+ .tx_fifo_depth = 32,
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+ .rx_fifo_depth = 32,
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+ .clk_khz = 25000,
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+ },
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+ [moorestown_2] = {
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+ .bus_num = 2,
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+ .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
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+ .tx_fifo_depth = 32,
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+ .rx_fifo_depth = 32,
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+ .clk_khz = 25000,
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+ },
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+ [medfield_0] = {
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+ .bus_num = 0,
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+ .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
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+ .tx_fifo_depth = 32,
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+ .rx_fifo_depth = 32,
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+ .clk_khz = 25000,
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+ },
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+ [medfield_1] = {
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+ .bus_num = 1,
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+ .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
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+ .tx_fifo_depth = 32,
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+ .rx_fifo_depth = 32,
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+ .clk_khz = 25000,
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+ },
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+ [medfield_2] = {
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+ .bus_num = 2,
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+ .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
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+ .tx_fifo_depth = 32,
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+ .rx_fifo_depth = 32,
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+ .clk_khz = 25000,
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+ },
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+ [medfield_3] = {
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+ .bus_num = 3,
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+ .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD,
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+ .tx_fifo_depth = 32,
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+ .rx_fifo_depth = 32,
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+ .clk_khz = 25000,
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+ },
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+ [medfield_4] = {
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+ .bus_num = 4,
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+ .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
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+ .tx_fifo_depth = 32,
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+ .rx_fifo_depth = 32,
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+ .clk_khz = 25000,
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+ },
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+ [medfield_5] = {
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+ .bus_num = 5,
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+ .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
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+ .tx_fifo_depth = 32,
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+ .rx_fifo_depth = 32,
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+ .clk_khz = 25000,
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+ },
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+};
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+static struct i2c_algorithm i2c_dw_algo = {
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+ .master_xfer = i2c_dw_xfer,
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+ .functionality = i2c_dw_func,
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+};
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+
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+static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
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+{
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+ return dev->controller->clk_khz;
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+}
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+
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+static int __devinit i2c_dw_pci_probe(struct pci_dev *pdev,
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+const struct pci_device_id *id)
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+{
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+ struct dw_i2c_dev *dev;
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+ struct i2c_adapter *adap;
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+ unsigned long start, len;
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+ void __iomem *base;
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+ int r;
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+ struct dw_pci_controller *controller;
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+
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+ if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers)) {
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+ printk(KERN_ERR "dw_i2c_pci_probe: invalid driver data %ld\n",
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+ id->driver_data);
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+ return -EINVAL;
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+ }
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+
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+ controller = &dw_pci_controllers[id->driver_data];
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+
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+ r = pci_enable_device(pdev);
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+ if (r) {
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+ dev_err(&pdev->dev, "Failed to enable I2C PCI device (%d)\n",
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+ r);
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+ goto exit;
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+ }
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+
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+ /* Determine the address of the I2C area */
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+ start = pci_resource_start(pdev, 0);
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+ len = pci_resource_len(pdev, 0);
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+ if (!start || len == 0) {
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+ dev_err(&pdev->dev, "base address not set\n");
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+ r = -ENODEV;
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+ goto exit;
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+ }
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+
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+ r = pci_request_region(pdev, 0, DRIVER_NAME);
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+ if (r) {
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+ dev_err(&pdev->dev, "failed to request I2C region "
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+ "0x%lx-0x%lx\n", start,
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+ (unsigned long)pci_resource_end(pdev, 0));
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+ goto exit;
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+ }
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+
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+ base = ioremap_nocache(start, len);
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+ if (!base) {
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+ dev_err(&pdev->dev, "I/O memory remapping failed\n");
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+ r = -ENOMEM;
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+ goto err_release_region;
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+ }
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+
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+
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+ dev = kzalloc(sizeof(struct dw_i2c_dev), GFP_KERNEL);
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+ if (!dev) {
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+ r = -ENOMEM;
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+ goto err_release_region;
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+ }
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+
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+ init_completion(&dev->cmd_complete);
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+ mutex_init(&dev->lock);
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+ dev->clk = NULL;
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+ dev->controller = controller;
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+ dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
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+ dev->base = base;
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+ dev->dev = get_device(&pdev->dev);
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+ dev->functionality =
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+ I2C_FUNC_I2C |
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+ I2C_FUNC_SMBUS_BYTE |
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+ I2C_FUNC_SMBUS_BYTE_DATA |
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+ I2C_FUNC_SMBUS_WORD_DATA |
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+ I2C_FUNC_SMBUS_I2C_BLOCK;
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+ dev->master_cfg = controller->bus_cfg;
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+
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+ pci_set_drvdata(pdev, dev);
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+
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+ dev->tx_fifo_depth = controller->tx_fifo_depth;
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+ dev->rx_fifo_depth = controller->rx_fifo_depth;
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+ r = i2c_dw_init(dev);
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+ if (r)
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+ goto err_iounmap;
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+
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+ adap = &dev->adapter;
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+ i2c_set_adapdata(adap, dev);
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+ adap->owner = THIS_MODULE;
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+ adap->class = 0;
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+ adap->algo = &i2c_dw_algo;
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+ adap->dev.parent = &pdev->dev;
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+ adap->nr = controller->bus_num;
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+ snprintf(adap->name, sizeof(adap->name), "i2c-designware-pci-%d",
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+ adap->nr);
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+
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+ r = request_irq(pdev->irq, i2c_dw_isr, IRQF_SHARED, adap->name, dev);
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+ if (r) {
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+ dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq);
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+ goto err_iounmap;
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+ }
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+
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+ i2c_dw_disable_int(dev);
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+ i2c_dw_clear_int(dev);
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+ r = i2c_add_numbered_adapter(adap);
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+ if (r) {
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+ dev_err(&pdev->dev, "failure adding adapter\n");
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+ goto err_free_irq;
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+ }
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+
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+ return 0;
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+
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+err_free_irq:
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+ free_irq(pdev->irq, dev);
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+err_iounmap:
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+ iounmap(dev->base);
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+ pci_set_drvdata(pdev, NULL);
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+ put_device(&pdev->dev);
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+ kfree(dev);
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+err_release_region:
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+ pci_release_region(pdev, 0);
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+exit:
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+ return r;
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+}
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+
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+static void __devexit i2c_dw_pci_remove(struct pci_dev *pdev)
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+{
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+ struct dw_i2c_dev *dev = pci_get_drvdata(pdev);
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+
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+ pci_set_drvdata(pdev, NULL);
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+ i2c_del_adapter(&dev->adapter);
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+ put_device(&pdev->dev);
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+
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+ free_irq(dev->irq, dev);
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+ kfree(dev);
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+ pci_release_region(pdev, 0);
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+}
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+
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+/* work with hotplug and coldplug */
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+MODULE_ALIAS("i2c_designware-pci");
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+
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+DEFINE_PCI_DEVICE_TABLE(i2_designware_pci_ids) = {
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+ /* Moorestown */
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+ { PCI_VDEVICE(INTEL, 0x0802), moorestown_0 },
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+ { PCI_VDEVICE(INTEL, 0x0803), moorestown_1 },
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+ { PCI_VDEVICE(INTEL, 0x0804), moorestown_2 },
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+ /* Medfield */
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+ { PCI_VDEVICE(INTEL, 0x0817), medfield_3,},
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+ { PCI_VDEVICE(INTEL, 0x0818), medfield_4 },
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+ { PCI_VDEVICE(INTEL, 0x0819), medfield_5 },
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+ { PCI_VDEVICE(INTEL, 0x082C), medfield_0 },
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+ { PCI_VDEVICE(INTEL, 0x082D), medfield_1 },
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+ { PCI_VDEVICE(INTEL, 0x082E), medfield_2 },
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+ { 0,}
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+};
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+MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);
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+
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+static struct pci_driver dw_i2c_driver = {
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+ .name = DRIVER_NAME,
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+ .id_table = i2_designware_pci_ids,
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+ .probe = i2c_dw_pci_probe,
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+ .remove = __devexit_p(i2c_dw_pci_remove),
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+};
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+
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+static int __init dw_i2c_init_driver(void)
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+{
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+ return pci_register_driver(&dw_i2c_driver);
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+}
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+module_init(dw_i2c_init_driver);
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+
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+static void __exit dw_i2c_exit_driver(void)
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+{
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+ pci_unregister_driver(&dw_i2c_driver);
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+}
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+module_exit(dw_i2c_exit_driver);
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+
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+MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
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+MODULE_DESCRIPTION("Synopsys DesignWare PCI I2C bus adapter");
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+MODULE_LICENSE("GPL");
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