i2c-designware-pcidrv.c 7.7 KB

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  1. /*
  2. * Synopsys DesignWare I2C adapter driver (master only).
  3. *
  4. * Based on the TI DAVINCI I2C adapter driver.
  5. *
  6. * Copyright (C) 2006 Texas Instruments.
  7. * Copyright (C) 2007 MontaVista Software Inc.
  8. * Copyright (C) 2009 Provigent Ltd.
  9. * Copyright (C) 2011 Intel corporation.
  10. *
  11. * ----------------------------------------------------------------------------
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26. * ----------------------------------------------------------------------------
  27. *
  28. */
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/delay.h>
  32. #include <linux/i2c.h>
  33. #include <linux/errno.h>
  34. #include <linux/sched.h>
  35. #include <linux/err.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/io.h>
  38. #include <linux/slab.h>
  39. #include <linux/pci.h>
  40. #include "i2c-designware-core.h"
  41. #define DRIVER_NAME "i2c-designware-pci"
  42. enum dw_pci_ctl_id_t {
  43. moorestown_0,
  44. moorestown_1,
  45. moorestown_2,
  46. medfield_0,
  47. medfield_1,
  48. medfield_2,
  49. medfield_3,
  50. medfield_4,
  51. medfield_5,
  52. };
  53. struct dw_pci_controller {
  54. u32 bus_num;
  55. u32 bus_cfg;
  56. u32 tx_fifo_depth;
  57. u32 rx_fifo_depth;
  58. u32 clk_khz;
  59. };
  60. #define INTEL_MID_STD_CFG (DW_IC_CON_MASTER | \
  61. DW_IC_CON_SLAVE_DISABLE | \
  62. DW_IC_CON_RESTART_EN)
  63. static struct dw_pci_controller dw_pci_controllers[] = {
  64. [moorestown_0] = {
  65. .bus_num = 0,
  66. .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
  67. .tx_fifo_depth = 32,
  68. .rx_fifo_depth = 32,
  69. .clk_khz = 25000,
  70. },
  71. [moorestown_1] = {
  72. .bus_num = 1,
  73. .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
  74. .tx_fifo_depth = 32,
  75. .rx_fifo_depth = 32,
  76. .clk_khz = 25000,
  77. },
  78. [moorestown_2] = {
  79. .bus_num = 2,
  80. .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
  81. .tx_fifo_depth = 32,
  82. .rx_fifo_depth = 32,
  83. .clk_khz = 25000,
  84. },
  85. [medfield_0] = {
  86. .bus_num = 0,
  87. .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
  88. .tx_fifo_depth = 32,
  89. .rx_fifo_depth = 32,
  90. .clk_khz = 25000,
  91. },
  92. [medfield_1] = {
  93. .bus_num = 1,
  94. .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
  95. .tx_fifo_depth = 32,
  96. .rx_fifo_depth = 32,
  97. .clk_khz = 25000,
  98. },
  99. [medfield_2] = {
  100. .bus_num = 2,
  101. .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
  102. .tx_fifo_depth = 32,
  103. .rx_fifo_depth = 32,
  104. .clk_khz = 25000,
  105. },
  106. [medfield_3] = {
  107. .bus_num = 3,
  108. .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD,
  109. .tx_fifo_depth = 32,
  110. .rx_fifo_depth = 32,
  111. .clk_khz = 25000,
  112. },
  113. [medfield_4] = {
  114. .bus_num = 4,
  115. .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
  116. .tx_fifo_depth = 32,
  117. .rx_fifo_depth = 32,
  118. .clk_khz = 25000,
  119. },
  120. [medfield_5] = {
  121. .bus_num = 5,
  122. .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
  123. .tx_fifo_depth = 32,
  124. .rx_fifo_depth = 32,
  125. .clk_khz = 25000,
  126. },
  127. };
  128. static struct i2c_algorithm i2c_dw_algo = {
  129. .master_xfer = i2c_dw_xfer,
  130. .functionality = i2c_dw_func,
  131. };
  132. static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
  133. {
  134. return dev->controller->clk_khz;
  135. }
  136. static int __devinit i2c_dw_pci_probe(struct pci_dev *pdev,
  137. const struct pci_device_id *id)
  138. {
  139. struct dw_i2c_dev *dev;
  140. struct i2c_adapter *adap;
  141. unsigned long start, len;
  142. void __iomem *base;
  143. int r;
  144. struct dw_pci_controller *controller;
  145. if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers)) {
  146. printk(KERN_ERR "dw_i2c_pci_probe: invalid driver data %ld\n",
  147. id->driver_data);
  148. return -EINVAL;
  149. }
  150. controller = &dw_pci_controllers[id->driver_data];
  151. r = pci_enable_device(pdev);
  152. if (r) {
  153. dev_err(&pdev->dev, "Failed to enable I2C PCI device (%d)\n",
  154. r);
  155. goto exit;
  156. }
  157. /* Determine the address of the I2C area */
  158. start = pci_resource_start(pdev, 0);
  159. len = pci_resource_len(pdev, 0);
  160. if (!start || len == 0) {
  161. dev_err(&pdev->dev, "base address not set\n");
  162. r = -ENODEV;
  163. goto exit;
  164. }
  165. r = pci_request_region(pdev, 0, DRIVER_NAME);
  166. if (r) {
  167. dev_err(&pdev->dev, "failed to request I2C region "
  168. "0x%lx-0x%lx\n", start,
  169. (unsigned long)pci_resource_end(pdev, 0));
  170. goto exit;
  171. }
  172. base = ioremap_nocache(start, len);
  173. if (!base) {
  174. dev_err(&pdev->dev, "I/O memory remapping failed\n");
  175. r = -ENOMEM;
  176. goto err_release_region;
  177. }
  178. dev = kzalloc(sizeof(struct dw_i2c_dev), GFP_KERNEL);
  179. if (!dev) {
  180. r = -ENOMEM;
  181. goto err_release_region;
  182. }
  183. init_completion(&dev->cmd_complete);
  184. mutex_init(&dev->lock);
  185. dev->clk = NULL;
  186. dev->controller = controller;
  187. dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
  188. dev->base = base;
  189. dev->dev = get_device(&pdev->dev);
  190. dev->functionality =
  191. I2C_FUNC_I2C |
  192. I2C_FUNC_SMBUS_BYTE |
  193. I2C_FUNC_SMBUS_BYTE_DATA |
  194. I2C_FUNC_SMBUS_WORD_DATA |
  195. I2C_FUNC_SMBUS_I2C_BLOCK;
  196. dev->master_cfg = controller->bus_cfg;
  197. pci_set_drvdata(pdev, dev);
  198. dev->tx_fifo_depth = controller->tx_fifo_depth;
  199. dev->rx_fifo_depth = controller->rx_fifo_depth;
  200. r = i2c_dw_init(dev);
  201. if (r)
  202. goto err_iounmap;
  203. adap = &dev->adapter;
  204. i2c_set_adapdata(adap, dev);
  205. adap->owner = THIS_MODULE;
  206. adap->class = 0;
  207. adap->algo = &i2c_dw_algo;
  208. adap->dev.parent = &pdev->dev;
  209. adap->nr = controller->bus_num;
  210. snprintf(adap->name, sizeof(adap->name), "i2c-designware-pci-%d",
  211. adap->nr);
  212. r = request_irq(pdev->irq, i2c_dw_isr, IRQF_SHARED, adap->name, dev);
  213. if (r) {
  214. dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq);
  215. goto err_iounmap;
  216. }
  217. i2c_dw_disable_int(dev);
  218. i2c_dw_clear_int(dev);
  219. r = i2c_add_numbered_adapter(adap);
  220. if (r) {
  221. dev_err(&pdev->dev, "failure adding adapter\n");
  222. goto err_free_irq;
  223. }
  224. return 0;
  225. err_free_irq:
  226. free_irq(pdev->irq, dev);
  227. err_iounmap:
  228. iounmap(dev->base);
  229. pci_set_drvdata(pdev, NULL);
  230. put_device(&pdev->dev);
  231. kfree(dev);
  232. err_release_region:
  233. pci_release_region(pdev, 0);
  234. exit:
  235. return r;
  236. }
  237. static void __devexit i2c_dw_pci_remove(struct pci_dev *pdev)
  238. {
  239. struct dw_i2c_dev *dev = pci_get_drvdata(pdev);
  240. pci_set_drvdata(pdev, NULL);
  241. i2c_del_adapter(&dev->adapter);
  242. put_device(&pdev->dev);
  243. free_irq(dev->irq, dev);
  244. kfree(dev);
  245. pci_release_region(pdev, 0);
  246. }
  247. /* work with hotplug and coldplug */
  248. MODULE_ALIAS("i2c_designware-pci");
  249. DEFINE_PCI_DEVICE_TABLE(i2_designware_pci_ids) = {
  250. /* Moorestown */
  251. { PCI_VDEVICE(INTEL, 0x0802), moorestown_0 },
  252. { PCI_VDEVICE(INTEL, 0x0803), moorestown_1 },
  253. { PCI_VDEVICE(INTEL, 0x0804), moorestown_2 },
  254. /* Medfield */
  255. { PCI_VDEVICE(INTEL, 0x0817), medfield_3,},
  256. { PCI_VDEVICE(INTEL, 0x0818), medfield_4 },
  257. { PCI_VDEVICE(INTEL, 0x0819), medfield_5 },
  258. { PCI_VDEVICE(INTEL, 0x082C), medfield_0 },
  259. { PCI_VDEVICE(INTEL, 0x082D), medfield_1 },
  260. { PCI_VDEVICE(INTEL, 0x082E), medfield_2 },
  261. { 0,}
  262. };
  263. MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);
  264. static struct pci_driver dw_i2c_driver = {
  265. .name = DRIVER_NAME,
  266. .id_table = i2_designware_pci_ids,
  267. .probe = i2c_dw_pci_probe,
  268. .remove = __devexit_p(i2c_dw_pci_remove),
  269. };
  270. static int __init dw_i2c_init_driver(void)
  271. {
  272. return pci_register_driver(&dw_i2c_driver);
  273. }
  274. module_init(dw_i2c_init_driver);
  275. static void __exit dw_i2c_exit_driver(void)
  276. {
  277. pci_unregister_driver(&dw_i2c_driver);
  278. }
  279. module_exit(dw_i2c_exit_driver);
  280. MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
  281. MODULE_DESCRIPTION("Synopsys DesignWare PCI I2C bus adapter");
  282. MODULE_LICENSE("GPL");