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@@ -36,7 +36,7 @@
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#define MAX_CRB_XFORM 60
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static unsigned long crb_addr_xform[MAX_CRB_XFORM];
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-int qla82xx_crb_table_initialized;
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+static int qla82xx_crb_table_initialized;
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#define qla82xx_crb_addr_transform(name) \
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(crb_addr_xform[QLA82XX_HW_PX_MAP_CRB_##name] = \
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@@ -102,7 +102,7 @@ static void qla82xx_crb_addr_transform_setup(void)
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qla82xx_crb_table_initialized = 1;
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}
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-struct crb_128M_2M_block_map crb_128M_2M_map[64] = {
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+static struct crb_128M_2M_block_map crb_128M_2M_map[64] = {
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{{{0, 0, 0, 0} } },
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{{{1, 0x0100000, 0x0102000, 0x120000},
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{1, 0x0110000, 0x0120000, 0x130000},
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@@ -262,7 +262,7 @@ struct crb_128M_2M_block_map crb_128M_2M_map[64] = {
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/*
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* top 12 bits of crb internal address (hub, agent)
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*/
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-unsigned qla82xx_crb_hub_agt[64] = {
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+static unsigned qla82xx_crb_hub_agt[64] = {
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0,
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QLA82XX_HW_CRB_HUB_AGT_ADR_PS,
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QLA82XX_HW_CRB_HUB_AGT_ADR_MN,
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@@ -330,7 +330,7 @@ unsigned qla82xx_crb_hub_agt[64] = {
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};
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/* Device states */
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-char *q_dev_state[] = {
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+static char *q_dev_state[] = {
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"Unknown",
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"Cold",
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"Initializing",
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@@ -359,12 +359,13 @@ qla82xx_pci_set_crbwindow_2M(struct qla_hw_data *ha, ulong *off)
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ha->crb_win = CRB_HI(*off);
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writel(ha->crb_win,
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- (void *)(CRB_WINDOW_2M + ha->nx_pcibase));
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+ (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase));
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/* Read back value to make sure write has gone through before trying
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* to use it.
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*/
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- win_read = RD_REG_DWORD((void *)(CRB_WINDOW_2M + ha->nx_pcibase));
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+ win_read = RD_REG_DWORD((void __iomem *)
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+ (CRB_WINDOW_2M + ha->nx_pcibase));
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if (win_read != ha->crb_win) {
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ql_dbg(ql_dbg_p3p, vha, 0xb000,
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"%s: Written crbwin (0x%x) "
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@@ -567,7 +568,7 @@ qla82xx_pci_mem_bound_check(struct qla_hw_data *ha,
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return 1;
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}
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-int qla82xx_pci_set_window_warning_count;
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+static int qla82xx_pci_set_window_warning_count;
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static unsigned long
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qla82xx_pci_set_window(struct qla_hw_data *ha, unsigned long long addr)
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@@ -677,10 +678,10 @@ static int qla82xx_pci_mem_read_direct(struct qla_hw_data *ha,
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u64 off, void *data, int size)
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{
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unsigned long flags;
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- void *addr = NULL;
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+ void __iomem *addr = NULL;
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int ret = 0;
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u64 start;
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- uint8_t *mem_ptr = NULL;
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+ uint8_t __iomem *mem_ptr = NULL;
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unsigned long mem_base;
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unsigned long mem_page;
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scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
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@@ -712,7 +713,7 @@ static int qla82xx_pci_mem_read_direct(struct qla_hw_data *ha,
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mem_ptr = ioremap(mem_base + mem_page, PAGE_SIZE * 2);
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else
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mem_ptr = ioremap(mem_base + mem_page, PAGE_SIZE);
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- if (mem_ptr == 0UL) {
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+ if (mem_ptr == NULL) {
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*(u8 *)data = 0;
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return -1;
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}
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@@ -749,10 +750,10 @@ qla82xx_pci_mem_write_direct(struct qla_hw_data *ha,
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u64 off, void *data, int size)
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{
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unsigned long flags;
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- void *addr = NULL;
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+ void __iomem *addr = NULL;
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int ret = 0;
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u64 start;
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- uint8_t *mem_ptr = NULL;
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+ uint8_t __iomem *mem_ptr = NULL;
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unsigned long mem_base;
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unsigned long mem_page;
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scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
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@@ -784,7 +785,7 @@ qla82xx_pci_mem_write_direct(struct qla_hw_data *ha,
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mem_ptr = ioremap(mem_base + mem_page, PAGE_SIZE*2);
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else
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mem_ptr = ioremap(mem_base + mem_page, PAGE_SIZE);
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- if (mem_ptr == 0UL)
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+ if (mem_ptr == NULL)
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return -1;
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addr = mem_ptr;
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@@ -908,24 +909,24 @@ qla82xx_wait_rom_done(struct qla_hw_data *ha)
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return 0;
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}
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-int
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+static int
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qla82xx_md_rw_32(struct qla_hw_data *ha, uint32_t off, u32 data, uint8_t flag)
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{
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uint32_t off_value, rval = 0;
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- WRT_REG_DWORD((void *)(CRB_WINDOW_2M + ha->nx_pcibase),
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+ WRT_REG_DWORD((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase),
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(off & 0xFFFF0000));
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/* Read back value to make sure write has gone through */
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- RD_REG_DWORD((void *)(CRB_WINDOW_2M + ha->nx_pcibase));
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+ RD_REG_DWORD((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase));
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off_value = (off & 0x0000FFFF);
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if (flag)
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- WRT_REG_DWORD((void *)
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+ WRT_REG_DWORD((void __iomem *)
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(off_value + CRB_INDIRECT_2M + ha->nx_pcibase),
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data);
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else
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- rval = RD_REG_DWORD((void *)
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+ rval = RD_REG_DWORD((void __iomem *)
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(off_value + CRB_INDIRECT_2M + ha->nx_pcibase));
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return rval;
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@@ -1764,14 +1765,6 @@ void qla82xx_config_rings(struct scsi_qla_host *vha)
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WRT_REG_DWORD((unsigned long __iomem *)®->rsp_q_out[0], 0);
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}
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-void qla82xx_reset_adapter(struct scsi_qla_host *vha)
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-{
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- struct qla_hw_data *ha = vha->hw;
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- vha->flags.online = 0;
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- qla2x00_try_to_stop_firmware(vha);
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- ha->isp_ops->disable_intrs(ha);
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-}
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-
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static int
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qla82xx_fw_load_from_blob(struct qla_hw_data *ha)
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{
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@@ -1856,7 +1849,7 @@ qla82xx_set_product_offset(struct qla_hw_data *ha)
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return -1;
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}
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-int
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+static int
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qla82xx_validate_firmware_blob(scsi_qla_host_t *vha, uint8_t fw_type)
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{
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__le32 val;
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@@ -1961,20 +1954,6 @@ qla82xx_check_rcvpeg_state(struct qla_hw_data *ha)
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}
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/* ISR related functions */
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-uint32_t qla82xx_isr_int_target_mask_enable[8] = {
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- ISR_INT_TARGET_MASK, ISR_INT_TARGET_MASK_F1,
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- ISR_INT_TARGET_MASK_F2, ISR_INT_TARGET_MASK_F3,
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- ISR_INT_TARGET_MASK_F4, ISR_INT_TARGET_MASK_F5,
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- ISR_INT_TARGET_MASK_F7, ISR_INT_TARGET_MASK_F7
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-};
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-
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-uint32_t qla82xx_isr_int_target_status[8] = {
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- ISR_INT_TARGET_STATUS, ISR_INT_TARGET_STATUS_F1,
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- ISR_INT_TARGET_STATUS_F2, ISR_INT_TARGET_STATUS_F3,
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- ISR_INT_TARGET_STATUS_F4, ISR_INT_TARGET_STATUS_F5,
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- ISR_INT_TARGET_STATUS_F7, ISR_INT_TARGET_STATUS_F7
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-};
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-
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static struct qla82xx_legacy_intr_set legacy_intr[] = \
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QLA82XX_LEGACY_INTR_CONFIG;
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@@ -2813,7 +2792,7 @@ qla82xx_start_iocbs(scsi_qla_host_t *vha)
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else {
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WRT_REG_DWORD((unsigned long __iomem *)ha->nxdb_wr_ptr, dbval);
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wmb();
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- while (RD_REG_DWORD(ha->nxdb_rd_ptr) != dbval) {
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+ while (RD_REG_DWORD((void __iomem *)ha->nxdb_rd_ptr) != dbval) {
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WRT_REG_DWORD((unsigned long __iomem *)ha->nxdb_wr_ptr,
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dbval);
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wmb();
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@@ -2821,7 +2800,8 @@ qla82xx_start_iocbs(scsi_qla_host_t *vha)
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}
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}
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-void qla82xx_rom_lock_recovery(struct qla_hw_data *ha)
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+static void
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+qla82xx_rom_lock_recovery(struct qla_hw_data *ha)
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{
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scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
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@@ -3177,7 +3157,7 @@ qla82xx_check_md_needed(scsi_qla_host_t *vha)
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}
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-int
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+static int
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qla82xx_check_fw_alive(scsi_qla_host_t *vha)
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{
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uint32_t fw_heartbeat_counter;
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@@ -3817,7 +3797,8 @@ qla82xx_minidump_process_rdocm(scsi_qla_host_t *vha,
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loop_cnt = ocm_hdr->op_count;
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for (i = 0; i < loop_cnt; i++) {
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- r_value = RD_REG_DWORD((void *)(r_addr + ha->nx_pcibase));
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+ r_value = RD_REG_DWORD((void __iomem *)
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+ (r_addr + ha->nx_pcibase));
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*data_ptr++ = cpu_to_le32(r_value);
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r_addr += r_stride;
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}
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@@ -4376,7 +4357,7 @@ qla82xx_md_free(scsi_qla_host_t *vha)
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ha->md_tmplt_hdr, ha->md_template_size / 1024);
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dma_free_coherent(&ha->pdev->dev, ha->md_template_size,
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ha->md_tmplt_hdr, ha->md_tmplt_hdr_dma);
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- ha->md_tmplt_hdr = 0;
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+ ha->md_tmplt_hdr = NULL;
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}
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/* Release the template data buffer allocated */
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@@ -4386,7 +4367,7 @@ qla82xx_md_free(scsi_qla_host_t *vha)
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ha->md_dump, ha->md_dump_size / 1024);
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vfree(ha->md_dump);
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ha->md_dump_size = 0;
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- ha->md_dump = 0;
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+ ha->md_dump = NULL;
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}
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}
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@@ -4423,7 +4404,7 @@ qla82xx_md_prep(scsi_qla_host_t *vha)
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dma_free_coherent(&ha->pdev->dev,
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ha->md_template_size,
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ha->md_tmplt_hdr, ha->md_tmplt_hdr_dma);
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- ha->md_tmplt_hdr = 0;
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+ ha->md_tmplt_hdr = NULL;
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}
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}
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