qla_iocb.c 75 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2012 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_target.h"
  9. #include <linux/blkdev.h>
  10. #include <linux/delay.h>
  11. #include <scsi/scsi_tcq.h>
  12. static void qla25xx_set_que(srb_t *, struct rsp_que **);
  13. /**
  14. * qla2x00_get_cmd_direction() - Determine control_flag data direction.
  15. * @cmd: SCSI command
  16. *
  17. * Returns the proper CF_* direction based on CDB.
  18. */
  19. static inline uint16_t
  20. qla2x00_get_cmd_direction(srb_t *sp)
  21. {
  22. uint16_t cflags;
  23. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  24. struct scsi_qla_host *vha = sp->fcport->vha;
  25. cflags = 0;
  26. /* Set transfer direction */
  27. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  28. cflags = CF_WRITE;
  29. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  30. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  31. cflags = CF_READ;
  32. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  33. }
  34. return (cflags);
  35. }
  36. /**
  37. * qla2x00_calc_iocbs_32() - Determine number of Command Type 2 and
  38. * Continuation Type 0 IOCBs to allocate.
  39. *
  40. * @dsds: number of data segment decriptors needed
  41. *
  42. * Returns the number of IOCB entries needed to store @dsds.
  43. */
  44. uint16_t
  45. qla2x00_calc_iocbs_32(uint16_t dsds)
  46. {
  47. uint16_t iocbs;
  48. iocbs = 1;
  49. if (dsds > 3) {
  50. iocbs += (dsds - 3) / 7;
  51. if ((dsds - 3) % 7)
  52. iocbs++;
  53. }
  54. return (iocbs);
  55. }
  56. /**
  57. * qla2x00_calc_iocbs_64() - Determine number of Command Type 3 and
  58. * Continuation Type 1 IOCBs to allocate.
  59. *
  60. * @dsds: number of data segment decriptors needed
  61. *
  62. * Returns the number of IOCB entries needed to store @dsds.
  63. */
  64. uint16_t
  65. qla2x00_calc_iocbs_64(uint16_t dsds)
  66. {
  67. uint16_t iocbs;
  68. iocbs = 1;
  69. if (dsds > 2) {
  70. iocbs += (dsds - 2) / 5;
  71. if ((dsds - 2) % 5)
  72. iocbs++;
  73. }
  74. return (iocbs);
  75. }
  76. /**
  77. * qla2x00_prep_cont_type0_iocb() - Initialize a Continuation Type 0 IOCB.
  78. * @ha: HA context
  79. *
  80. * Returns a pointer to the Continuation Type 0 IOCB packet.
  81. */
  82. static inline cont_entry_t *
  83. qla2x00_prep_cont_type0_iocb(struct scsi_qla_host *vha)
  84. {
  85. cont_entry_t *cont_pkt;
  86. struct req_que *req = vha->req;
  87. /* Adjust ring index. */
  88. req->ring_index++;
  89. if (req->ring_index == req->length) {
  90. req->ring_index = 0;
  91. req->ring_ptr = req->ring;
  92. } else {
  93. req->ring_ptr++;
  94. }
  95. cont_pkt = (cont_entry_t *)req->ring_ptr;
  96. /* Load packet defaults. */
  97. *((uint32_t *)(&cont_pkt->entry_type)) =
  98. __constant_cpu_to_le32(CONTINUE_TYPE);
  99. return (cont_pkt);
  100. }
  101. /**
  102. * qla2x00_prep_cont_type1_iocb() - Initialize a Continuation Type 1 IOCB.
  103. * @ha: HA context
  104. *
  105. * Returns a pointer to the continuation type 1 IOCB packet.
  106. */
  107. static inline cont_a64_entry_t *
  108. qla2x00_prep_cont_type1_iocb(scsi_qla_host_t *vha, struct req_que *req)
  109. {
  110. cont_a64_entry_t *cont_pkt;
  111. /* Adjust ring index. */
  112. req->ring_index++;
  113. if (req->ring_index == req->length) {
  114. req->ring_index = 0;
  115. req->ring_ptr = req->ring;
  116. } else {
  117. req->ring_ptr++;
  118. }
  119. cont_pkt = (cont_a64_entry_t *)req->ring_ptr;
  120. /* Load packet defaults. */
  121. *((uint32_t *)(&cont_pkt->entry_type)) =
  122. __constant_cpu_to_le32(CONTINUE_A64_TYPE);
  123. return (cont_pkt);
  124. }
  125. static inline int
  126. qla24xx_configure_prot_mode(srb_t *sp, uint16_t *fw_prot_opts)
  127. {
  128. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  129. uint8_t guard = scsi_host_get_guard(cmd->device->host);
  130. /* We always use DIFF Bundling for best performance */
  131. *fw_prot_opts = 0;
  132. /* Translate SCSI opcode to a protection opcode */
  133. switch (scsi_get_prot_op(cmd)) {
  134. case SCSI_PROT_READ_STRIP:
  135. *fw_prot_opts |= PO_MODE_DIF_REMOVE;
  136. break;
  137. case SCSI_PROT_WRITE_INSERT:
  138. *fw_prot_opts |= PO_MODE_DIF_INSERT;
  139. break;
  140. case SCSI_PROT_READ_INSERT:
  141. *fw_prot_opts |= PO_MODE_DIF_INSERT;
  142. break;
  143. case SCSI_PROT_WRITE_STRIP:
  144. *fw_prot_opts |= PO_MODE_DIF_REMOVE;
  145. break;
  146. case SCSI_PROT_READ_PASS:
  147. case SCSI_PROT_WRITE_PASS:
  148. if (guard & SHOST_DIX_GUARD_IP)
  149. *fw_prot_opts |= PO_MODE_DIF_TCP_CKSUM;
  150. else
  151. *fw_prot_opts |= PO_MODE_DIF_PASS;
  152. break;
  153. default: /* Normal Request */
  154. *fw_prot_opts |= PO_MODE_DIF_PASS;
  155. break;
  156. }
  157. return scsi_prot_sg_count(cmd);
  158. }
  159. /*
  160. * qla2x00_build_scsi_iocbs_32() - Build IOCB command utilizing 32bit
  161. * capable IOCB types.
  162. *
  163. * @sp: SRB command to process
  164. * @cmd_pkt: Command type 2 IOCB
  165. * @tot_dsds: Total number of segments to transfer
  166. */
  167. void qla2x00_build_scsi_iocbs_32(srb_t *sp, cmd_entry_t *cmd_pkt,
  168. uint16_t tot_dsds)
  169. {
  170. uint16_t avail_dsds;
  171. uint32_t *cur_dsd;
  172. scsi_qla_host_t *vha;
  173. struct scsi_cmnd *cmd;
  174. struct scatterlist *sg;
  175. int i;
  176. cmd = GET_CMD_SP(sp);
  177. /* Update entry type to indicate Command Type 2 IOCB */
  178. *((uint32_t *)(&cmd_pkt->entry_type)) =
  179. __constant_cpu_to_le32(COMMAND_TYPE);
  180. /* No data transfer */
  181. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  182. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  183. return;
  184. }
  185. vha = sp->fcport->vha;
  186. cmd_pkt->control_flags |= cpu_to_le16(qla2x00_get_cmd_direction(sp));
  187. /* Three DSDs are available in the Command Type 2 IOCB */
  188. avail_dsds = 3;
  189. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  190. /* Load data segments */
  191. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  192. cont_entry_t *cont_pkt;
  193. /* Allocate additional continuation packets? */
  194. if (avail_dsds == 0) {
  195. /*
  196. * Seven DSDs are available in the Continuation
  197. * Type 0 IOCB.
  198. */
  199. cont_pkt = qla2x00_prep_cont_type0_iocb(vha);
  200. cur_dsd = (uint32_t *)&cont_pkt->dseg_0_address;
  201. avail_dsds = 7;
  202. }
  203. *cur_dsd++ = cpu_to_le32(sg_dma_address(sg));
  204. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  205. avail_dsds--;
  206. }
  207. }
  208. /**
  209. * qla2x00_build_scsi_iocbs_64() - Build IOCB command utilizing 64bit
  210. * capable IOCB types.
  211. *
  212. * @sp: SRB command to process
  213. * @cmd_pkt: Command type 3 IOCB
  214. * @tot_dsds: Total number of segments to transfer
  215. */
  216. void qla2x00_build_scsi_iocbs_64(srb_t *sp, cmd_entry_t *cmd_pkt,
  217. uint16_t tot_dsds)
  218. {
  219. uint16_t avail_dsds;
  220. uint32_t *cur_dsd;
  221. scsi_qla_host_t *vha;
  222. struct scsi_cmnd *cmd;
  223. struct scatterlist *sg;
  224. int i;
  225. cmd = GET_CMD_SP(sp);
  226. /* Update entry type to indicate Command Type 3 IOCB */
  227. *((uint32_t *)(&cmd_pkt->entry_type)) =
  228. __constant_cpu_to_le32(COMMAND_A64_TYPE);
  229. /* No data transfer */
  230. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  231. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  232. return;
  233. }
  234. vha = sp->fcport->vha;
  235. cmd_pkt->control_flags |= cpu_to_le16(qla2x00_get_cmd_direction(sp));
  236. /* Two DSDs are available in the Command Type 3 IOCB */
  237. avail_dsds = 2;
  238. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  239. /* Load data segments */
  240. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  241. dma_addr_t sle_dma;
  242. cont_a64_entry_t *cont_pkt;
  243. /* Allocate additional continuation packets? */
  244. if (avail_dsds == 0) {
  245. /*
  246. * Five DSDs are available in the Continuation
  247. * Type 1 IOCB.
  248. */
  249. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  250. cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
  251. avail_dsds = 5;
  252. }
  253. sle_dma = sg_dma_address(sg);
  254. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  255. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  256. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  257. avail_dsds--;
  258. }
  259. }
  260. /**
  261. * qla2x00_start_scsi() - Send a SCSI command to the ISP
  262. * @sp: command to send to the ISP
  263. *
  264. * Returns non-zero if a failure occurred, else zero.
  265. */
  266. int
  267. qla2x00_start_scsi(srb_t *sp)
  268. {
  269. int ret, nseg;
  270. unsigned long flags;
  271. scsi_qla_host_t *vha;
  272. struct scsi_cmnd *cmd;
  273. uint32_t *clr_ptr;
  274. uint32_t index;
  275. uint32_t handle;
  276. cmd_entry_t *cmd_pkt;
  277. uint16_t cnt;
  278. uint16_t req_cnt;
  279. uint16_t tot_dsds;
  280. struct device_reg_2xxx __iomem *reg;
  281. struct qla_hw_data *ha;
  282. struct req_que *req;
  283. struct rsp_que *rsp;
  284. char tag[2];
  285. /* Setup device pointers. */
  286. ret = 0;
  287. vha = sp->fcport->vha;
  288. ha = vha->hw;
  289. reg = &ha->iobase->isp;
  290. cmd = GET_CMD_SP(sp);
  291. req = ha->req_q_map[0];
  292. rsp = ha->rsp_q_map[0];
  293. /* So we know we haven't pci_map'ed anything yet */
  294. tot_dsds = 0;
  295. /* Send marker if required */
  296. if (vha->marker_needed != 0) {
  297. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  298. QLA_SUCCESS) {
  299. return (QLA_FUNCTION_FAILED);
  300. }
  301. vha->marker_needed = 0;
  302. }
  303. /* Acquire ring specific lock */
  304. spin_lock_irqsave(&ha->hardware_lock, flags);
  305. /* Check for room in outstanding command list. */
  306. handle = req->current_outstanding_cmd;
  307. for (index = 1; index < MAX_OUTSTANDING_COMMANDS; index++) {
  308. handle++;
  309. if (handle == MAX_OUTSTANDING_COMMANDS)
  310. handle = 1;
  311. if (!req->outstanding_cmds[handle])
  312. break;
  313. }
  314. if (index == MAX_OUTSTANDING_COMMANDS)
  315. goto queuing_error;
  316. /* Map the sg table so we have an accurate count of sg entries needed */
  317. if (scsi_sg_count(cmd)) {
  318. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  319. scsi_sg_count(cmd), cmd->sc_data_direction);
  320. if (unlikely(!nseg))
  321. goto queuing_error;
  322. } else
  323. nseg = 0;
  324. tot_dsds = nseg;
  325. /* Calculate the number of request entries needed. */
  326. req_cnt = ha->isp_ops->calc_req_entries(tot_dsds);
  327. if (req->cnt < (req_cnt + 2)) {
  328. cnt = RD_REG_WORD_RELAXED(ISP_REQ_Q_OUT(ha, reg));
  329. if (req->ring_index < cnt)
  330. req->cnt = cnt - req->ring_index;
  331. else
  332. req->cnt = req->length -
  333. (req->ring_index - cnt);
  334. /* If still no head room then bail out */
  335. if (req->cnt < (req_cnt + 2))
  336. goto queuing_error;
  337. }
  338. /* Build command packet */
  339. req->current_outstanding_cmd = handle;
  340. req->outstanding_cmds[handle] = sp;
  341. sp->handle = handle;
  342. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  343. req->cnt -= req_cnt;
  344. cmd_pkt = (cmd_entry_t *)req->ring_ptr;
  345. cmd_pkt->handle = handle;
  346. /* Zero out remaining portion of packet. */
  347. clr_ptr = (uint32_t *)cmd_pkt + 2;
  348. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  349. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  350. /* Set target ID and LUN number*/
  351. SET_TARGET_ID(ha, cmd_pkt->target, sp->fcport->loop_id);
  352. cmd_pkt->lun = cpu_to_le16(cmd->device->lun);
  353. /* Update tagged queuing modifier */
  354. if (scsi_populate_tag_msg(cmd, tag)) {
  355. switch (tag[0]) {
  356. case HEAD_OF_QUEUE_TAG:
  357. cmd_pkt->control_flags =
  358. __constant_cpu_to_le16(CF_HEAD_TAG);
  359. break;
  360. case ORDERED_QUEUE_TAG:
  361. cmd_pkt->control_flags =
  362. __constant_cpu_to_le16(CF_ORDERED_TAG);
  363. break;
  364. default:
  365. cmd_pkt->control_flags =
  366. __constant_cpu_to_le16(CF_SIMPLE_TAG);
  367. break;
  368. }
  369. }
  370. /* Load SCSI command packet. */
  371. memcpy(cmd_pkt->scsi_cdb, cmd->cmnd, cmd->cmd_len);
  372. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  373. /* Build IOCB segments */
  374. ha->isp_ops->build_iocbs(sp, cmd_pkt, tot_dsds);
  375. /* Set total data segment count. */
  376. cmd_pkt->entry_count = (uint8_t)req_cnt;
  377. wmb();
  378. /* Adjust ring index. */
  379. req->ring_index++;
  380. if (req->ring_index == req->length) {
  381. req->ring_index = 0;
  382. req->ring_ptr = req->ring;
  383. } else
  384. req->ring_ptr++;
  385. sp->flags |= SRB_DMA_VALID;
  386. /* Set chip new ring index. */
  387. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), req->ring_index);
  388. RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, reg)); /* PCI Posting. */
  389. /* Manage unprocessed RIO/ZIO commands in response queue. */
  390. if (vha->flags.process_response_queue &&
  391. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  392. qla2x00_process_response_queue(rsp);
  393. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  394. return (QLA_SUCCESS);
  395. queuing_error:
  396. if (tot_dsds)
  397. scsi_dma_unmap(cmd);
  398. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  399. return (QLA_FUNCTION_FAILED);
  400. }
  401. /**
  402. * qla2x00_start_iocbs() - Execute the IOCB command
  403. */
  404. void
  405. qla2x00_start_iocbs(struct scsi_qla_host *vha, struct req_que *req)
  406. {
  407. struct qla_hw_data *ha = vha->hw;
  408. device_reg_t __iomem *reg = ISP_QUE_REG(ha, req->id);
  409. if (IS_QLA82XX(ha)) {
  410. qla82xx_start_iocbs(vha);
  411. } else {
  412. /* Adjust ring index. */
  413. req->ring_index++;
  414. if (req->ring_index == req->length) {
  415. req->ring_index = 0;
  416. req->ring_ptr = req->ring;
  417. } else
  418. req->ring_ptr++;
  419. /* Set chip new ring index. */
  420. if (ha->mqenable || IS_QLA83XX(ha)) {
  421. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  422. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  423. } else if (IS_FWI2_CAPABLE(ha)) {
  424. WRT_REG_DWORD(&reg->isp24.req_q_in, req->ring_index);
  425. RD_REG_DWORD_RELAXED(&reg->isp24.req_q_in);
  426. } else {
  427. WRT_REG_WORD(ISP_REQ_Q_IN(ha, &reg->isp),
  428. req->ring_index);
  429. RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, &reg->isp));
  430. }
  431. }
  432. }
  433. /**
  434. * qla2x00_marker() - Send a marker IOCB to the firmware.
  435. * @ha: HA context
  436. * @loop_id: loop ID
  437. * @lun: LUN
  438. * @type: marker modifier
  439. *
  440. * Can be called from both normal and interrupt context.
  441. *
  442. * Returns non-zero if a failure occurred, else zero.
  443. */
  444. static int
  445. __qla2x00_marker(struct scsi_qla_host *vha, struct req_que *req,
  446. struct rsp_que *rsp, uint16_t loop_id,
  447. uint16_t lun, uint8_t type)
  448. {
  449. mrk_entry_t *mrk;
  450. struct mrk_entry_24xx *mrk24;
  451. struct qla_hw_data *ha = vha->hw;
  452. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  453. mrk24 = NULL;
  454. req = ha->req_q_map[0];
  455. mrk = (mrk_entry_t *)qla2x00_alloc_iocbs(vha, NULL);
  456. if (mrk == NULL) {
  457. ql_log(ql_log_warn, base_vha, 0x3026,
  458. "Failed to allocate Marker IOCB.\n");
  459. return (QLA_FUNCTION_FAILED);
  460. }
  461. mrk->entry_type = MARKER_TYPE;
  462. mrk->modifier = type;
  463. if (type != MK_SYNC_ALL) {
  464. if (IS_FWI2_CAPABLE(ha)) {
  465. mrk24 = (struct mrk_entry_24xx *) mrk;
  466. mrk24->nport_handle = cpu_to_le16(loop_id);
  467. mrk24->lun[1] = LSB(lun);
  468. mrk24->lun[2] = MSB(lun);
  469. host_to_fcp_swap(mrk24->lun, sizeof(mrk24->lun));
  470. mrk24->vp_index = vha->vp_idx;
  471. mrk24->handle = MAKE_HANDLE(req->id, mrk24->handle);
  472. } else {
  473. SET_TARGET_ID(ha, mrk->target, loop_id);
  474. mrk->lun = cpu_to_le16(lun);
  475. }
  476. }
  477. wmb();
  478. qla2x00_start_iocbs(vha, req);
  479. return (QLA_SUCCESS);
  480. }
  481. int
  482. qla2x00_marker(struct scsi_qla_host *vha, struct req_que *req,
  483. struct rsp_que *rsp, uint16_t loop_id, uint16_t lun,
  484. uint8_t type)
  485. {
  486. int ret;
  487. unsigned long flags = 0;
  488. spin_lock_irqsave(&vha->hw->hardware_lock, flags);
  489. ret = __qla2x00_marker(vha, req, rsp, loop_id, lun, type);
  490. spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
  491. return (ret);
  492. }
  493. /*
  494. * qla2x00_issue_marker
  495. *
  496. * Issue marker
  497. * Caller CAN have hardware lock held as specified by ha_locked parameter.
  498. * Might release it, then reaquire.
  499. */
  500. int qla2x00_issue_marker(scsi_qla_host_t *vha, int ha_locked)
  501. {
  502. if (ha_locked) {
  503. if (__qla2x00_marker(vha, vha->req, vha->req->rsp, 0, 0,
  504. MK_SYNC_ALL) != QLA_SUCCESS)
  505. return QLA_FUNCTION_FAILED;
  506. } else {
  507. if (qla2x00_marker(vha, vha->req, vha->req->rsp, 0, 0,
  508. MK_SYNC_ALL) != QLA_SUCCESS)
  509. return QLA_FUNCTION_FAILED;
  510. }
  511. vha->marker_needed = 0;
  512. return QLA_SUCCESS;
  513. }
  514. /**
  515. * qla24xx_calc_iocbs() - Determine number of Command Type 3 and
  516. * Continuation Type 1 IOCBs to allocate.
  517. *
  518. * @dsds: number of data segment decriptors needed
  519. *
  520. * Returns the number of IOCB entries needed to store @dsds.
  521. */
  522. inline uint16_t
  523. qla24xx_calc_iocbs(scsi_qla_host_t *vha, uint16_t dsds)
  524. {
  525. uint16_t iocbs;
  526. iocbs = 1;
  527. if (dsds > 1) {
  528. iocbs += (dsds - 1) / 5;
  529. if ((dsds - 1) % 5)
  530. iocbs++;
  531. }
  532. return iocbs;
  533. }
  534. static inline int
  535. qla24xx_build_scsi_type_6_iocbs(srb_t *sp, struct cmd_type_6 *cmd_pkt,
  536. uint16_t tot_dsds)
  537. {
  538. uint32_t *cur_dsd = NULL;
  539. scsi_qla_host_t *vha;
  540. struct qla_hw_data *ha;
  541. struct scsi_cmnd *cmd;
  542. struct scatterlist *cur_seg;
  543. uint32_t *dsd_seg;
  544. void *next_dsd;
  545. uint8_t avail_dsds;
  546. uint8_t first_iocb = 1;
  547. uint32_t dsd_list_len;
  548. struct dsd_dma *dsd_ptr;
  549. struct ct6_dsd *ctx;
  550. cmd = GET_CMD_SP(sp);
  551. /* Update entry type to indicate Command Type 3 IOCB */
  552. *((uint32_t *)(&cmd_pkt->entry_type)) =
  553. __constant_cpu_to_le32(COMMAND_TYPE_6);
  554. /* No data transfer */
  555. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  556. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  557. return 0;
  558. }
  559. vha = sp->fcport->vha;
  560. ha = vha->hw;
  561. /* Set transfer direction */
  562. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  563. cmd_pkt->control_flags =
  564. __constant_cpu_to_le16(CF_WRITE_DATA);
  565. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  566. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  567. cmd_pkt->control_flags =
  568. __constant_cpu_to_le16(CF_READ_DATA);
  569. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  570. }
  571. cur_seg = scsi_sglist(cmd);
  572. ctx = GET_CMD_CTX_SP(sp);
  573. while (tot_dsds) {
  574. avail_dsds = (tot_dsds > QLA_DSDS_PER_IOCB) ?
  575. QLA_DSDS_PER_IOCB : tot_dsds;
  576. tot_dsds -= avail_dsds;
  577. dsd_list_len = (avail_dsds + 1) * QLA_DSD_SIZE;
  578. dsd_ptr = list_first_entry(&ha->gbl_dsd_list,
  579. struct dsd_dma, list);
  580. next_dsd = dsd_ptr->dsd_addr;
  581. list_del(&dsd_ptr->list);
  582. ha->gbl_dsd_avail--;
  583. list_add_tail(&dsd_ptr->list, &ctx->dsd_list);
  584. ctx->dsd_use_cnt++;
  585. ha->gbl_dsd_inuse++;
  586. if (first_iocb) {
  587. first_iocb = 0;
  588. dsd_seg = (uint32_t *)&cmd_pkt->fcp_data_dseg_address;
  589. *dsd_seg++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  590. *dsd_seg++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  591. cmd_pkt->fcp_data_dseg_len = cpu_to_le32(dsd_list_len);
  592. } else {
  593. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  594. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  595. *cur_dsd++ = cpu_to_le32(dsd_list_len);
  596. }
  597. cur_dsd = (uint32_t *)next_dsd;
  598. while (avail_dsds) {
  599. dma_addr_t sle_dma;
  600. sle_dma = sg_dma_address(cur_seg);
  601. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  602. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  603. *cur_dsd++ = cpu_to_le32(sg_dma_len(cur_seg));
  604. cur_seg = sg_next(cur_seg);
  605. avail_dsds--;
  606. }
  607. }
  608. /* Null termination */
  609. *cur_dsd++ = 0;
  610. *cur_dsd++ = 0;
  611. *cur_dsd++ = 0;
  612. cmd_pkt->control_flags |= CF_DATA_SEG_DESCR_ENABLE;
  613. return 0;
  614. }
  615. /*
  616. * qla24xx_calc_dsd_lists() - Determine number of DSD list required
  617. * for Command Type 6.
  618. *
  619. * @dsds: number of data segment decriptors needed
  620. *
  621. * Returns the number of dsd list needed to store @dsds.
  622. */
  623. inline uint16_t
  624. qla24xx_calc_dsd_lists(uint16_t dsds)
  625. {
  626. uint16_t dsd_lists = 0;
  627. dsd_lists = (dsds/QLA_DSDS_PER_IOCB);
  628. if (dsds % QLA_DSDS_PER_IOCB)
  629. dsd_lists++;
  630. return dsd_lists;
  631. }
  632. /**
  633. * qla24xx_build_scsi_iocbs() - Build IOCB command utilizing Command Type 7
  634. * IOCB types.
  635. *
  636. * @sp: SRB command to process
  637. * @cmd_pkt: Command type 3 IOCB
  638. * @tot_dsds: Total number of segments to transfer
  639. */
  640. inline void
  641. qla24xx_build_scsi_iocbs(srb_t *sp, struct cmd_type_7 *cmd_pkt,
  642. uint16_t tot_dsds)
  643. {
  644. uint16_t avail_dsds;
  645. uint32_t *cur_dsd;
  646. scsi_qla_host_t *vha;
  647. struct scsi_cmnd *cmd;
  648. struct scatterlist *sg;
  649. int i;
  650. struct req_que *req;
  651. cmd = GET_CMD_SP(sp);
  652. /* Update entry type to indicate Command Type 3 IOCB */
  653. *((uint32_t *)(&cmd_pkt->entry_type)) =
  654. __constant_cpu_to_le32(COMMAND_TYPE_7);
  655. /* No data transfer */
  656. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  657. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  658. return;
  659. }
  660. vha = sp->fcport->vha;
  661. req = vha->req;
  662. /* Set transfer direction */
  663. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  664. cmd_pkt->task_mgmt_flags =
  665. __constant_cpu_to_le16(TMF_WRITE_DATA);
  666. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  667. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  668. cmd_pkt->task_mgmt_flags =
  669. __constant_cpu_to_le16(TMF_READ_DATA);
  670. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  671. }
  672. /* One DSD is available in the Command Type 3 IOCB */
  673. avail_dsds = 1;
  674. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  675. /* Load data segments */
  676. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  677. dma_addr_t sle_dma;
  678. cont_a64_entry_t *cont_pkt;
  679. /* Allocate additional continuation packets? */
  680. if (avail_dsds == 0) {
  681. /*
  682. * Five DSDs are available in the Continuation
  683. * Type 1 IOCB.
  684. */
  685. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  686. cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
  687. avail_dsds = 5;
  688. }
  689. sle_dma = sg_dma_address(sg);
  690. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  691. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  692. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  693. avail_dsds--;
  694. }
  695. }
  696. struct fw_dif_context {
  697. uint32_t ref_tag;
  698. uint16_t app_tag;
  699. uint8_t ref_tag_mask[4]; /* Validation/Replacement Mask*/
  700. uint8_t app_tag_mask[2]; /* Validation/Replacement Mask*/
  701. };
  702. /*
  703. * qla24xx_set_t10dif_tags_from_cmd - Extract Ref and App tags from SCSI command
  704. *
  705. */
  706. static inline void
  707. qla24xx_set_t10dif_tags(srb_t *sp, struct fw_dif_context *pkt,
  708. unsigned int protcnt)
  709. {
  710. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  711. switch (scsi_get_prot_type(cmd)) {
  712. case SCSI_PROT_DIF_TYPE0:
  713. /*
  714. * No check for ql2xenablehba_err_chk, as it would be an
  715. * I/O error if hba tag generation is not done.
  716. */
  717. pkt->ref_tag = cpu_to_le32((uint32_t)
  718. (0xffffffff & scsi_get_lba(cmd)));
  719. if (!qla2x00_hba_err_chk_enabled(sp))
  720. break;
  721. pkt->ref_tag_mask[0] = 0xff;
  722. pkt->ref_tag_mask[1] = 0xff;
  723. pkt->ref_tag_mask[2] = 0xff;
  724. pkt->ref_tag_mask[3] = 0xff;
  725. break;
  726. /*
  727. * For TYPE 2 protection: 16 bit GUARD + 32 bit REF tag has to
  728. * match LBA in CDB + N
  729. */
  730. case SCSI_PROT_DIF_TYPE2:
  731. pkt->app_tag = __constant_cpu_to_le16(0);
  732. pkt->app_tag_mask[0] = 0x0;
  733. pkt->app_tag_mask[1] = 0x0;
  734. pkt->ref_tag = cpu_to_le32((uint32_t)
  735. (0xffffffff & scsi_get_lba(cmd)));
  736. if (!qla2x00_hba_err_chk_enabled(sp))
  737. break;
  738. /* enable ALL bytes of the ref tag */
  739. pkt->ref_tag_mask[0] = 0xff;
  740. pkt->ref_tag_mask[1] = 0xff;
  741. pkt->ref_tag_mask[2] = 0xff;
  742. pkt->ref_tag_mask[3] = 0xff;
  743. break;
  744. /* For Type 3 protection: 16 bit GUARD only */
  745. case SCSI_PROT_DIF_TYPE3:
  746. pkt->ref_tag_mask[0] = pkt->ref_tag_mask[1] =
  747. pkt->ref_tag_mask[2] = pkt->ref_tag_mask[3] =
  748. 0x00;
  749. break;
  750. /*
  751. * For TYpe 1 protection: 16 bit GUARD tag, 32 bit REF tag, and
  752. * 16 bit app tag.
  753. */
  754. case SCSI_PROT_DIF_TYPE1:
  755. pkt->ref_tag = cpu_to_le32((uint32_t)
  756. (0xffffffff & scsi_get_lba(cmd)));
  757. pkt->app_tag = __constant_cpu_to_le16(0);
  758. pkt->app_tag_mask[0] = 0x0;
  759. pkt->app_tag_mask[1] = 0x0;
  760. if (!qla2x00_hba_err_chk_enabled(sp))
  761. break;
  762. /* enable ALL bytes of the ref tag */
  763. pkt->ref_tag_mask[0] = 0xff;
  764. pkt->ref_tag_mask[1] = 0xff;
  765. pkt->ref_tag_mask[2] = 0xff;
  766. pkt->ref_tag_mask[3] = 0xff;
  767. break;
  768. }
  769. }
  770. struct qla2_sgx {
  771. dma_addr_t dma_addr; /* OUT */
  772. uint32_t dma_len; /* OUT */
  773. uint32_t tot_bytes; /* IN */
  774. struct scatterlist *cur_sg; /* IN */
  775. /* for book keeping, bzero on initial invocation */
  776. uint32_t bytes_consumed;
  777. uint32_t num_bytes;
  778. uint32_t tot_partial;
  779. /* for debugging */
  780. uint32_t num_sg;
  781. srb_t *sp;
  782. };
  783. static int
  784. qla24xx_get_one_block_sg(uint32_t blk_sz, struct qla2_sgx *sgx,
  785. uint32_t *partial)
  786. {
  787. struct scatterlist *sg;
  788. uint32_t cumulative_partial, sg_len;
  789. dma_addr_t sg_dma_addr;
  790. if (sgx->num_bytes == sgx->tot_bytes)
  791. return 0;
  792. sg = sgx->cur_sg;
  793. cumulative_partial = sgx->tot_partial;
  794. sg_dma_addr = sg_dma_address(sg);
  795. sg_len = sg_dma_len(sg);
  796. sgx->dma_addr = sg_dma_addr + sgx->bytes_consumed;
  797. if ((cumulative_partial + (sg_len - sgx->bytes_consumed)) >= blk_sz) {
  798. sgx->dma_len = (blk_sz - cumulative_partial);
  799. sgx->tot_partial = 0;
  800. sgx->num_bytes += blk_sz;
  801. *partial = 0;
  802. } else {
  803. sgx->dma_len = sg_len - sgx->bytes_consumed;
  804. sgx->tot_partial += sgx->dma_len;
  805. *partial = 1;
  806. }
  807. sgx->bytes_consumed += sgx->dma_len;
  808. if (sg_len == sgx->bytes_consumed) {
  809. sg = sg_next(sg);
  810. sgx->num_sg++;
  811. sgx->cur_sg = sg;
  812. sgx->bytes_consumed = 0;
  813. }
  814. return 1;
  815. }
  816. static int
  817. qla24xx_walk_and_build_sglist_no_difb(struct qla_hw_data *ha, srb_t *sp,
  818. uint32_t *dsd, uint16_t tot_dsds)
  819. {
  820. void *next_dsd;
  821. uint8_t avail_dsds = 0;
  822. uint32_t dsd_list_len;
  823. struct dsd_dma *dsd_ptr;
  824. struct scatterlist *sg_prot;
  825. uint32_t *cur_dsd = dsd;
  826. uint16_t used_dsds = tot_dsds;
  827. uint32_t prot_int;
  828. uint32_t partial;
  829. struct qla2_sgx sgx;
  830. dma_addr_t sle_dma;
  831. uint32_t sle_dma_len, tot_prot_dma_len = 0;
  832. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  833. prot_int = cmd->device->sector_size;
  834. memset(&sgx, 0, sizeof(struct qla2_sgx));
  835. sgx.tot_bytes = scsi_bufflen(cmd);
  836. sgx.cur_sg = scsi_sglist(cmd);
  837. sgx.sp = sp;
  838. sg_prot = scsi_prot_sglist(cmd);
  839. while (qla24xx_get_one_block_sg(prot_int, &sgx, &partial)) {
  840. sle_dma = sgx.dma_addr;
  841. sle_dma_len = sgx.dma_len;
  842. alloc_and_fill:
  843. /* Allocate additional continuation packets? */
  844. if (avail_dsds == 0) {
  845. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  846. QLA_DSDS_PER_IOCB : used_dsds;
  847. dsd_list_len = (avail_dsds + 1) * 12;
  848. used_dsds -= avail_dsds;
  849. /* allocate tracking DS */
  850. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  851. if (!dsd_ptr)
  852. return 1;
  853. /* allocate new list */
  854. dsd_ptr->dsd_addr = next_dsd =
  855. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  856. &dsd_ptr->dsd_list_dma);
  857. if (!next_dsd) {
  858. /*
  859. * Need to cleanup only this dsd_ptr, rest
  860. * will be done by sp_free_dma()
  861. */
  862. kfree(dsd_ptr);
  863. return 1;
  864. }
  865. list_add_tail(&dsd_ptr->list,
  866. &((struct crc_context *)sp->u.scmd.ctx)->dsd_list);
  867. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  868. /* add new list to cmd iocb or last list */
  869. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  870. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  871. *cur_dsd++ = dsd_list_len;
  872. cur_dsd = (uint32_t *)next_dsd;
  873. }
  874. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  875. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  876. *cur_dsd++ = cpu_to_le32(sle_dma_len);
  877. avail_dsds--;
  878. if (partial == 0) {
  879. /* Got a full protection interval */
  880. sle_dma = sg_dma_address(sg_prot) + tot_prot_dma_len;
  881. sle_dma_len = 8;
  882. tot_prot_dma_len += sle_dma_len;
  883. if (tot_prot_dma_len == sg_dma_len(sg_prot)) {
  884. tot_prot_dma_len = 0;
  885. sg_prot = sg_next(sg_prot);
  886. }
  887. partial = 1; /* So as to not re-enter this block */
  888. goto alloc_and_fill;
  889. }
  890. }
  891. /* Null termination */
  892. *cur_dsd++ = 0;
  893. *cur_dsd++ = 0;
  894. *cur_dsd++ = 0;
  895. return 0;
  896. }
  897. static int
  898. qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp, uint32_t *dsd,
  899. uint16_t tot_dsds)
  900. {
  901. void *next_dsd;
  902. uint8_t avail_dsds = 0;
  903. uint32_t dsd_list_len;
  904. struct dsd_dma *dsd_ptr;
  905. struct scatterlist *sg;
  906. uint32_t *cur_dsd = dsd;
  907. int i;
  908. uint16_t used_dsds = tot_dsds;
  909. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  910. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  911. dma_addr_t sle_dma;
  912. /* Allocate additional continuation packets? */
  913. if (avail_dsds == 0) {
  914. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  915. QLA_DSDS_PER_IOCB : used_dsds;
  916. dsd_list_len = (avail_dsds + 1) * 12;
  917. used_dsds -= avail_dsds;
  918. /* allocate tracking DS */
  919. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  920. if (!dsd_ptr)
  921. return 1;
  922. /* allocate new list */
  923. dsd_ptr->dsd_addr = next_dsd =
  924. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  925. &dsd_ptr->dsd_list_dma);
  926. if (!next_dsd) {
  927. /*
  928. * Need to cleanup only this dsd_ptr, rest
  929. * will be done by sp_free_dma()
  930. */
  931. kfree(dsd_ptr);
  932. return 1;
  933. }
  934. list_add_tail(&dsd_ptr->list,
  935. &((struct crc_context *)sp->u.scmd.ctx)->dsd_list);
  936. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  937. /* add new list to cmd iocb or last list */
  938. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  939. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  940. *cur_dsd++ = dsd_list_len;
  941. cur_dsd = (uint32_t *)next_dsd;
  942. }
  943. sle_dma = sg_dma_address(sg);
  944. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  945. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  946. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  947. avail_dsds--;
  948. }
  949. /* Null termination */
  950. *cur_dsd++ = 0;
  951. *cur_dsd++ = 0;
  952. *cur_dsd++ = 0;
  953. return 0;
  954. }
  955. static int
  956. qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *ha, srb_t *sp,
  957. uint32_t *dsd,
  958. uint16_t tot_dsds)
  959. {
  960. void *next_dsd;
  961. uint8_t avail_dsds = 0;
  962. uint32_t dsd_list_len;
  963. struct dsd_dma *dsd_ptr;
  964. struct scatterlist *sg;
  965. int i;
  966. struct scsi_cmnd *cmd;
  967. uint32_t *cur_dsd = dsd;
  968. uint16_t used_dsds = tot_dsds;
  969. cmd = GET_CMD_SP(sp);
  970. scsi_for_each_prot_sg(cmd, sg, tot_dsds, i) {
  971. dma_addr_t sle_dma;
  972. /* Allocate additional continuation packets? */
  973. if (avail_dsds == 0) {
  974. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  975. QLA_DSDS_PER_IOCB : used_dsds;
  976. dsd_list_len = (avail_dsds + 1) * 12;
  977. used_dsds -= avail_dsds;
  978. /* allocate tracking DS */
  979. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  980. if (!dsd_ptr)
  981. return 1;
  982. /* allocate new list */
  983. dsd_ptr->dsd_addr = next_dsd =
  984. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  985. &dsd_ptr->dsd_list_dma);
  986. if (!next_dsd) {
  987. /*
  988. * Need to cleanup only this dsd_ptr, rest
  989. * will be done by sp_free_dma()
  990. */
  991. kfree(dsd_ptr);
  992. return 1;
  993. }
  994. list_add_tail(&dsd_ptr->list,
  995. &((struct crc_context *)sp->u.scmd.ctx)->dsd_list);
  996. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  997. /* add new list to cmd iocb or last list */
  998. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  999. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  1000. *cur_dsd++ = dsd_list_len;
  1001. cur_dsd = (uint32_t *)next_dsd;
  1002. }
  1003. sle_dma = sg_dma_address(sg);
  1004. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  1005. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  1006. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1007. avail_dsds--;
  1008. }
  1009. /* Null termination */
  1010. *cur_dsd++ = 0;
  1011. *cur_dsd++ = 0;
  1012. *cur_dsd++ = 0;
  1013. return 0;
  1014. }
  1015. /**
  1016. * qla24xx_build_scsi_crc_2_iocbs() - Build IOCB command utilizing Command
  1017. * Type 6 IOCB types.
  1018. *
  1019. * @sp: SRB command to process
  1020. * @cmd_pkt: Command type 3 IOCB
  1021. * @tot_dsds: Total number of segments to transfer
  1022. */
  1023. static inline int
  1024. qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt,
  1025. uint16_t tot_dsds, uint16_t tot_prot_dsds, uint16_t fw_prot_opts)
  1026. {
  1027. uint32_t *cur_dsd, *fcp_dl;
  1028. scsi_qla_host_t *vha;
  1029. struct scsi_cmnd *cmd;
  1030. struct scatterlist *cur_seg;
  1031. int sgc;
  1032. uint32_t total_bytes = 0;
  1033. uint32_t data_bytes;
  1034. uint32_t dif_bytes;
  1035. uint8_t bundling = 1;
  1036. uint16_t blk_size;
  1037. uint8_t *clr_ptr;
  1038. struct crc_context *crc_ctx_pkt = NULL;
  1039. struct qla_hw_data *ha;
  1040. uint8_t additional_fcpcdb_len;
  1041. uint16_t fcp_cmnd_len;
  1042. struct fcp_cmnd *fcp_cmnd;
  1043. dma_addr_t crc_ctx_dma;
  1044. char tag[2];
  1045. cmd = GET_CMD_SP(sp);
  1046. sgc = 0;
  1047. /* Update entry type to indicate Command Type CRC_2 IOCB */
  1048. *((uint32_t *)(&cmd_pkt->entry_type)) =
  1049. __constant_cpu_to_le32(COMMAND_TYPE_CRC_2);
  1050. vha = sp->fcport->vha;
  1051. ha = vha->hw;
  1052. /* No data transfer */
  1053. data_bytes = scsi_bufflen(cmd);
  1054. if (!data_bytes || cmd->sc_data_direction == DMA_NONE) {
  1055. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  1056. return QLA_SUCCESS;
  1057. }
  1058. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  1059. /* Set transfer direction */
  1060. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  1061. cmd_pkt->control_flags =
  1062. __constant_cpu_to_le16(CF_WRITE_DATA);
  1063. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  1064. cmd_pkt->control_flags =
  1065. __constant_cpu_to_le16(CF_READ_DATA);
  1066. }
  1067. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1068. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP) ||
  1069. (scsi_get_prot_op(cmd) == SCSI_PROT_READ_STRIP) ||
  1070. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_INSERT))
  1071. bundling = 0;
  1072. /* Allocate CRC context from global pool */
  1073. crc_ctx_pkt = sp->u.scmd.ctx =
  1074. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC, &crc_ctx_dma);
  1075. if (!crc_ctx_pkt)
  1076. goto crc_queuing_error;
  1077. /* Zero out CTX area. */
  1078. clr_ptr = (uint8_t *)crc_ctx_pkt;
  1079. memset(clr_ptr, 0, sizeof(*crc_ctx_pkt));
  1080. crc_ctx_pkt->crc_ctx_dma = crc_ctx_dma;
  1081. sp->flags |= SRB_CRC_CTX_DMA_VALID;
  1082. /* Set handle */
  1083. crc_ctx_pkt->handle = cmd_pkt->handle;
  1084. INIT_LIST_HEAD(&crc_ctx_pkt->dsd_list);
  1085. qla24xx_set_t10dif_tags(sp, (struct fw_dif_context *)
  1086. &crc_ctx_pkt->ref_tag, tot_prot_dsds);
  1087. cmd_pkt->crc_context_address[0] = cpu_to_le32(LSD(crc_ctx_dma));
  1088. cmd_pkt->crc_context_address[1] = cpu_to_le32(MSD(crc_ctx_dma));
  1089. cmd_pkt->crc_context_len = CRC_CONTEXT_LEN_FW;
  1090. /* Determine SCSI command length -- align to 4 byte boundary */
  1091. if (cmd->cmd_len > 16) {
  1092. additional_fcpcdb_len = cmd->cmd_len - 16;
  1093. if ((cmd->cmd_len % 4) != 0) {
  1094. /* SCSI cmd > 16 bytes must be multiple of 4 */
  1095. goto crc_queuing_error;
  1096. }
  1097. fcp_cmnd_len = 12 + cmd->cmd_len + 4;
  1098. } else {
  1099. additional_fcpcdb_len = 0;
  1100. fcp_cmnd_len = 12 + 16 + 4;
  1101. }
  1102. fcp_cmnd = &crc_ctx_pkt->fcp_cmnd;
  1103. fcp_cmnd->additional_cdb_len = additional_fcpcdb_len;
  1104. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  1105. fcp_cmnd->additional_cdb_len |= 1;
  1106. else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
  1107. fcp_cmnd->additional_cdb_len |= 2;
  1108. int_to_scsilun(cmd->device->lun, &fcp_cmnd->lun);
  1109. memcpy(fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len);
  1110. cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(fcp_cmnd_len);
  1111. cmd_pkt->fcp_cmnd_dseg_address[0] = cpu_to_le32(
  1112. LSD(crc_ctx_dma + CRC_CONTEXT_FCPCMND_OFF));
  1113. cmd_pkt->fcp_cmnd_dseg_address[1] = cpu_to_le32(
  1114. MSD(crc_ctx_dma + CRC_CONTEXT_FCPCMND_OFF));
  1115. fcp_cmnd->task_management = 0;
  1116. /*
  1117. * Update tagged queuing modifier if using command tag queuing
  1118. */
  1119. if (scsi_populate_tag_msg(cmd, tag)) {
  1120. switch (tag[0]) {
  1121. case HEAD_OF_QUEUE_TAG:
  1122. fcp_cmnd->task_attribute = TSK_HEAD_OF_QUEUE;
  1123. break;
  1124. case ORDERED_QUEUE_TAG:
  1125. fcp_cmnd->task_attribute = TSK_ORDERED;
  1126. break;
  1127. default:
  1128. fcp_cmnd->task_attribute = 0;
  1129. break;
  1130. }
  1131. } else {
  1132. fcp_cmnd->task_attribute = 0;
  1133. }
  1134. cmd_pkt->fcp_rsp_dseg_len = 0; /* Let response come in status iocb */
  1135. /* Compute dif len and adjust data len to incude protection */
  1136. dif_bytes = 0;
  1137. blk_size = cmd->device->sector_size;
  1138. dif_bytes = (data_bytes / blk_size) * 8;
  1139. switch (scsi_get_prot_op(GET_CMD_SP(sp))) {
  1140. case SCSI_PROT_READ_INSERT:
  1141. case SCSI_PROT_WRITE_STRIP:
  1142. total_bytes = data_bytes;
  1143. data_bytes += dif_bytes;
  1144. break;
  1145. case SCSI_PROT_READ_STRIP:
  1146. case SCSI_PROT_WRITE_INSERT:
  1147. case SCSI_PROT_READ_PASS:
  1148. case SCSI_PROT_WRITE_PASS:
  1149. total_bytes = data_bytes + dif_bytes;
  1150. break;
  1151. default:
  1152. BUG();
  1153. }
  1154. if (!qla2x00_hba_err_chk_enabled(sp))
  1155. fw_prot_opts |= 0x10; /* Disable Guard tag checking */
  1156. /* HBA error checking enabled */
  1157. else if (IS_PI_UNINIT_CAPABLE(ha)) {
  1158. if ((scsi_get_prot_type(GET_CMD_SP(sp)) == SCSI_PROT_DIF_TYPE1)
  1159. || (scsi_get_prot_type(GET_CMD_SP(sp)) ==
  1160. SCSI_PROT_DIF_TYPE2))
  1161. fw_prot_opts |= BIT_10;
  1162. else if (scsi_get_prot_type(GET_CMD_SP(sp)) ==
  1163. SCSI_PROT_DIF_TYPE3)
  1164. fw_prot_opts |= BIT_11;
  1165. }
  1166. if (!bundling) {
  1167. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.nobundling.data_address;
  1168. } else {
  1169. /*
  1170. * Configure Bundling if we need to fetch interlaving
  1171. * protection PCI accesses
  1172. */
  1173. fw_prot_opts |= PO_ENABLE_DIF_BUNDLING;
  1174. crc_ctx_pkt->u.bundling.dif_byte_count = cpu_to_le32(dif_bytes);
  1175. crc_ctx_pkt->u.bundling.dseg_count = cpu_to_le16(tot_dsds -
  1176. tot_prot_dsds);
  1177. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.bundling.data_address;
  1178. }
  1179. /* Finish the common fields of CRC pkt */
  1180. crc_ctx_pkt->blk_size = cpu_to_le16(blk_size);
  1181. crc_ctx_pkt->prot_opts = cpu_to_le16(fw_prot_opts);
  1182. crc_ctx_pkt->byte_count = cpu_to_le32(data_bytes);
  1183. crc_ctx_pkt->guard_seed = __constant_cpu_to_le16(0);
  1184. /* Fibre channel byte count */
  1185. cmd_pkt->byte_count = cpu_to_le32(total_bytes);
  1186. fcp_dl = (uint32_t *)(crc_ctx_pkt->fcp_cmnd.cdb + 16 +
  1187. additional_fcpcdb_len);
  1188. *fcp_dl = htonl(total_bytes);
  1189. if (!data_bytes || cmd->sc_data_direction == DMA_NONE) {
  1190. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  1191. return QLA_SUCCESS;
  1192. }
  1193. /* Walks data segments */
  1194. cmd_pkt->control_flags |=
  1195. __constant_cpu_to_le16(CF_DATA_SEG_DESCR_ENABLE);
  1196. if (!bundling && tot_prot_dsds) {
  1197. if (qla24xx_walk_and_build_sglist_no_difb(ha, sp,
  1198. cur_dsd, tot_dsds))
  1199. goto crc_queuing_error;
  1200. } else if (qla24xx_walk_and_build_sglist(ha, sp, cur_dsd,
  1201. (tot_dsds - tot_prot_dsds)))
  1202. goto crc_queuing_error;
  1203. if (bundling && tot_prot_dsds) {
  1204. /* Walks dif segments */
  1205. cur_seg = scsi_prot_sglist(cmd);
  1206. cmd_pkt->control_flags |=
  1207. __constant_cpu_to_le16(CF_DIF_SEG_DESCR_ENABLE);
  1208. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.bundling.dif_address;
  1209. if (qla24xx_walk_and_build_prot_sglist(ha, sp, cur_dsd,
  1210. tot_prot_dsds))
  1211. goto crc_queuing_error;
  1212. }
  1213. return QLA_SUCCESS;
  1214. crc_queuing_error:
  1215. /* Cleanup will be performed by the caller */
  1216. return QLA_FUNCTION_FAILED;
  1217. }
  1218. /**
  1219. * qla24xx_start_scsi() - Send a SCSI command to the ISP
  1220. * @sp: command to send to the ISP
  1221. *
  1222. * Returns non-zero if a failure occurred, else zero.
  1223. */
  1224. int
  1225. qla24xx_start_scsi(srb_t *sp)
  1226. {
  1227. int ret, nseg;
  1228. unsigned long flags;
  1229. uint32_t *clr_ptr;
  1230. uint32_t index;
  1231. uint32_t handle;
  1232. struct cmd_type_7 *cmd_pkt;
  1233. uint16_t cnt;
  1234. uint16_t req_cnt;
  1235. uint16_t tot_dsds;
  1236. struct req_que *req = NULL;
  1237. struct rsp_que *rsp = NULL;
  1238. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1239. struct scsi_qla_host *vha = sp->fcport->vha;
  1240. struct qla_hw_data *ha = vha->hw;
  1241. char tag[2];
  1242. /* Setup device pointers. */
  1243. ret = 0;
  1244. qla25xx_set_que(sp, &rsp);
  1245. req = vha->req;
  1246. /* So we know we haven't pci_map'ed anything yet */
  1247. tot_dsds = 0;
  1248. /* Send marker if required */
  1249. if (vha->marker_needed != 0) {
  1250. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  1251. QLA_SUCCESS)
  1252. return QLA_FUNCTION_FAILED;
  1253. vha->marker_needed = 0;
  1254. }
  1255. /* Acquire ring specific lock */
  1256. spin_lock_irqsave(&ha->hardware_lock, flags);
  1257. /* Check for room in outstanding command list. */
  1258. handle = req->current_outstanding_cmd;
  1259. for (index = 1; index < MAX_OUTSTANDING_COMMANDS; index++) {
  1260. handle++;
  1261. if (handle == MAX_OUTSTANDING_COMMANDS)
  1262. handle = 1;
  1263. if (!req->outstanding_cmds[handle])
  1264. break;
  1265. }
  1266. if (index == MAX_OUTSTANDING_COMMANDS) {
  1267. goto queuing_error;
  1268. }
  1269. /* Map the sg table so we have an accurate count of sg entries needed */
  1270. if (scsi_sg_count(cmd)) {
  1271. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1272. scsi_sg_count(cmd), cmd->sc_data_direction);
  1273. if (unlikely(!nseg))
  1274. goto queuing_error;
  1275. } else
  1276. nseg = 0;
  1277. tot_dsds = nseg;
  1278. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  1279. if (req->cnt < (req_cnt + 2)) {
  1280. cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
  1281. if (req->ring_index < cnt)
  1282. req->cnt = cnt - req->ring_index;
  1283. else
  1284. req->cnt = req->length -
  1285. (req->ring_index - cnt);
  1286. if (req->cnt < (req_cnt + 2))
  1287. goto queuing_error;
  1288. }
  1289. /* Build command packet. */
  1290. req->current_outstanding_cmd = handle;
  1291. req->outstanding_cmds[handle] = sp;
  1292. sp->handle = handle;
  1293. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1294. req->cnt -= req_cnt;
  1295. cmd_pkt = (struct cmd_type_7 *)req->ring_ptr;
  1296. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  1297. /* Zero out remaining portion of packet. */
  1298. /* tagged queuing modifier -- default is TSK_SIMPLE (0). */
  1299. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1300. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1301. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1302. /* Set NPORT-ID and LUN number*/
  1303. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1304. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1305. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1306. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1307. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  1308. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1309. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1310. /* Update tagged queuing modifier -- default is TSK_SIMPLE (0). */
  1311. if (scsi_populate_tag_msg(cmd, tag)) {
  1312. switch (tag[0]) {
  1313. case HEAD_OF_QUEUE_TAG:
  1314. cmd_pkt->task = TSK_HEAD_OF_QUEUE;
  1315. break;
  1316. case ORDERED_QUEUE_TAG:
  1317. cmd_pkt->task = TSK_ORDERED;
  1318. break;
  1319. }
  1320. }
  1321. /* Load SCSI command packet. */
  1322. memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
  1323. host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
  1324. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  1325. /* Build IOCB segments */
  1326. qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds);
  1327. /* Set total data segment count. */
  1328. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1329. /* Specify response queue number where completion should happen */
  1330. cmd_pkt->entry_status = (uint8_t) rsp->id;
  1331. wmb();
  1332. /* Adjust ring index. */
  1333. req->ring_index++;
  1334. if (req->ring_index == req->length) {
  1335. req->ring_index = 0;
  1336. req->ring_ptr = req->ring;
  1337. } else
  1338. req->ring_ptr++;
  1339. sp->flags |= SRB_DMA_VALID;
  1340. /* Set chip new ring index. */
  1341. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  1342. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  1343. /* Manage unprocessed RIO/ZIO commands in response queue. */
  1344. if (vha->flags.process_response_queue &&
  1345. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  1346. qla24xx_process_response_queue(vha, rsp);
  1347. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1348. return QLA_SUCCESS;
  1349. queuing_error:
  1350. if (tot_dsds)
  1351. scsi_dma_unmap(cmd);
  1352. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1353. return QLA_FUNCTION_FAILED;
  1354. }
  1355. /**
  1356. * qla24xx_dif_start_scsi() - Send a SCSI command to the ISP
  1357. * @sp: command to send to the ISP
  1358. *
  1359. * Returns non-zero if a failure occurred, else zero.
  1360. */
  1361. int
  1362. qla24xx_dif_start_scsi(srb_t *sp)
  1363. {
  1364. int nseg;
  1365. unsigned long flags;
  1366. uint32_t *clr_ptr;
  1367. uint32_t index;
  1368. uint32_t handle;
  1369. uint16_t cnt;
  1370. uint16_t req_cnt = 0;
  1371. uint16_t tot_dsds;
  1372. uint16_t tot_prot_dsds;
  1373. uint16_t fw_prot_opts = 0;
  1374. struct req_que *req = NULL;
  1375. struct rsp_que *rsp = NULL;
  1376. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1377. struct scsi_qla_host *vha = sp->fcport->vha;
  1378. struct qla_hw_data *ha = vha->hw;
  1379. struct cmd_type_crc_2 *cmd_pkt;
  1380. uint32_t status = 0;
  1381. #define QDSS_GOT_Q_SPACE BIT_0
  1382. /* Only process protection or >16 cdb in this routine */
  1383. if (scsi_get_prot_op(cmd) == SCSI_PROT_NORMAL) {
  1384. if (cmd->cmd_len <= 16)
  1385. return qla24xx_start_scsi(sp);
  1386. }
  1387. /* Setup device pointers. */
  1388. qla25xx_set_que(sp, &rsp);
  1389. req = vha->req;
  1390. /* So we know we haven't pci_map'ed anything yet */
  1391. tot_dsds = 0;
  1392. /* Send marker if required */
  1393. if (vha->marker_needed != 0) {
  1394. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  1395. QLA_SUCCESS)
  1396. return QLA_FUNCTION_FAILED;
  1397. vha->marker_needed = 0;
  1398. }
  1399. /* Acquire ring specific lock */
  1400. spin_lock_irqsave(&ha->hardware_lock, flags);
  1401. /* Check for room in outstanding command list. */
  1402. handle = req->current_outstanding_cmd;
  1403. for (index = 1; index < MAX_OUTSTANDING_COMMANDS; index++) {
  1404. handle++;
  1405. if (handle == MAX_OUTSTANDING_COMMANDS)
  1406. handle = 1;
  1407. if (!req->outstanding_cmds[handle])
  1408. break;
  1409. }
  1410. if (index == MAX_OUTSTANDING_COMMANDS)
  1411. goto queuing_error;
  1412. /* Compute number of required data segments */
  1413. /* Map the sg table so we have an accurate count of sg entries needed */
  1414. if (scsi_sg_count(cmd)) {
  1415. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1416. scsi_sg_count(cmd), cmd->sc_data_direction);
  1417. if (unlikely(!nseg))
  1418. goto queuing_error;
  1419. else
  1420. sp->flags |= SRB_DMA_VALID;
  1421. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1422. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1423. struct qla2_sgx sgx;
  1424. uint32_t partial;
  1425. memset(&sgx, 0, sizeof(struct qla2_sgx));
  1426. sgx.tot_bytes = scsi_bufflen(cmd);
  1427. sgx.cur_sg = scsi_sglist(cmd);
  1428. sgx.sp = sp;
  1429. nseg = 0;
  1430. while (qla24xx_get_one_block_sg(
  1431. cmd->device->sector_size, &sgx, &partial))
  1432. nseg++;
  1433. }
  1434. } else
  1435. nseg = 0;
  1436. /* number of required data segments */
  1437. tot_dsds = nseg;
  1438. /* Compute number of required protection segments */
  1439. if (qla24xx_configure_prot_mode(sp, &fw_prot_opts)) {
  1440. nseg = dma_map_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
  1441. scsi_prot_sg_count(cmd), cmd->sc_data_direction);
  1442. if (unlikely(!nseg))
  1443. goto queuing_error;
  1444. else
  1445. sp->flags |= SRB_CRC_PROT_DMA_VALID;
  1446. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1447. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1448. nseg = scsi_bufflen(cmd) / cmd->device->sector_size;
  1449. }
  1450. } else {
  1451. nseg = 0;
  1452. }
  1453. req_cnt = 1;
  1454. /* Total Data and protection sg segment(s) */
  1455. tot_prot_dsds = nseg;
  1456. tot_dsds += nseg;
  1457. if (req->cnt < (req_cnt + 2)) {
  1458. cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
  1459. if (req->ring_index < cnt)
  1460. req->cnt = cnt - req->ring_index;
  1461. else
  1462. req->cnt = req->length -
  1463. (req->ring_index - cnt);
  1464. if (req->cnt < (req_cnt + 2))
  1465. goto queuing_error;
  1466. }
  1467. status |= QDSS_GOT_Q_SPACE;
  1468. /* Build header part of command packet (excluding the OPCODE). */
  1469. req->current_outstanding_cmd = handle;
  1470. req->outstanding_cmds[handle] = sp;
  1471. sp->handle = handle;
  1472. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1473. req->cnt -= req_cnt;
  1474. /* Fill-in common area */
  1475. cmd_pkt = (struct cmd_type_crc_2 *)req->ring_ptr;
  1476. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  1477. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1478. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1479. /* Set NPORT-ID and LUN number*/
  1480. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1481. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1482. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1483. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1484. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1485. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1486. /* Total Data and protection segment(s) */
  1487. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1488. /* Build IOCB segments and adjust for data protection segments */
  1489. if (qla24xx_build_scsi_crc_2_iocbs(sp, (struct cmd_type_crc_2 *)
  1490. req->ring_ptr, tot_dsds, tot_prot_dsds, fw_prot_opts) !=
  1491. QLA_SUCCESS)
  1492. goto queuing_error;
  1493. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1494. /* Specify response queue number where completion should happen */
  1495. cmd_pkt->entry_status = (uint8_t) rsp->id;
  1496. cmd_pkt->timeout = __constant_cpu_to_le16(0);
  1497. wmb();
  1498. /* Adjust ring index. */
  1499. req->ring_index++;
  1500. if (req->ring_index == req->length) {
  1501. req->ring_index = 0;
  1502. req->ring_ptr = req->ring;
  1503. } else
  1504. req->ring_ptr++;
  1505. /* Set chip new ring index. */
  1506. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  1507. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  1508. /* Manage unprocessed RIO/ZIO commands in response queue. */
  1509. if (vha->flags.process_response_queue &&
  1510. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  1511. qla24xx_process_response_queue(vha, rsp);
  1512. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1513. return QLA_SUCCESS;
  1514. queuing_error:
  1515. if (status & QDSS_GOT_Q_SPACE) {
  1516. req->outstanding_cmds[handle] = NULL;
  1517. req->cnt += req_cnt;
  1518. }
  1519. /* Cleanup will be performed by the caller (queuecommand) */
  1520. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1521. return QLA_FUNCTION_FAILED;
  1522. }
  1523. static void qla25xx_set_que(srb_t *sp, struct rsp_que **rsp)
  1524. {
  1525. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1526. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1527. int affinity = cmd->request->cpu;
  1528. if (ha->flags.cpu_affinity_enabled && affinity >= 0 &&
  1529. affinity < ha->max_rsp_queues - 1)
  1530. *rsp = ha->rsp_q_map[affinity + 1];
  1531. else
  1532. *rsp = ha->rsp_q_map[0];
  1533. }
  1534. /* Generic Control-SRB manipulation functions. */
  1535. void *
  1536. qla2x00_alloc_iocbs(scsi_qla_host_t *vha, srb_t *sp)
  1537. {
  1538. struct qla_hw_data *ha = vha->hw;
  1539. struct req_que *req = ha->req_q_map[0];
  1540. device_reg_t __iomem *reg = ISP_QUE_REG(ha, req->id);
  1541. uint32_t index, handle;
  1542. request_t *pkt;
  1543. uint16_t cnt, req_cnt;
  1544. pkt = NULL;
  1545. req_cnt = 1;
  1546. handle = 0;
  1547. if (!sp)
  1548. goto skip_cmd_array;
  1549. /* Check for room in outstanding command list. */
  1550. handle = req->current_outstanding_cmd;
  1551. for (index = 1; index < MAX_OUTSTANDING_COMMANDS; index++) {
  1552. handle++;
  1553. if (handle == MAX_OUTSTANDING_COMMANDS)
  1554. handle = 1;
  1555. if (!req->outstanding_cmds[handle])
  1556. break;
  1557. }
  1558. if (index == MAX_OUTSTANDING_COMMANDS) {
  1559. ql_log(ql_log_warn, vha, 0x700b,
  1560. "No room on outstanding cmd array.\n");
  1561. goto queuing_error;
  1562. }
  1563. /* Prep command array. */
  1564. req->current_outstanding_cmd = handle;
  1565. req->outstanding_cmds[handle] = sp;
  1566. sp->handle = handle;
  1567. /* Adjust entry-counts as needed. */
  1568. if (sp->type != SRB_SCSI_CMD)
  1569. req_cnt = sp->iocbs;
  1570. skip_cmd_array:
  1571. /* Check for room on request queue. */
  1572. if (req->cnt < req_cnt) {
  1573. if (ha->mqenable || IS_QLA83XX(ha))
  1574. cnt = RD_REG_DWORD(&reg->isp25mq.req_q_out);
  1575. else if (IS_QLA82XX(ha))
  1576. cnt = RD_REG_DWORD(&reg->isp82.req_q_out);
  1577. else if (IS_FWI2_CAPABLE(ha))
  1578. cnt = RD_REG_DWORD(&reg->isp24.req_q_out);
  1579. else
  1580. cnt = qla2x00_debounce_register(
  1581. ISP_REQ_Q_OUT(ha, &reg->isp));
  1582. if (req->ring_index < cnt)
  1583. req->cnt = cnt - req->ring_index;
  1584. else
  1585. req->cnt = req->length -
  1586. (req->ring_index - cnt);
  1587. }
  1588. if (req->cnt < req_cnt)
  1589. goto queuing_error;
  1590. /* Prep packet */
  1591. req->cnt -= req_cnt;
  1592. pkt = req->ring_ptr;
  1593. memset(pkt, 0, REQUEST_ENTRY_SIZE);
  1594. pkt->entry_count = req_cnt;
  1595. pkt->handle = handle;
  1596. queuing_error:
  1597. return pkt;
  1598. }
  1599. static void
  1600. qla24xx_login_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1601. {
  1602. struct srb_iocb *lio = &sp->u.iocb_cmd;
  1603. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1604. logio->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI);
  1605. if (lio->u.logio.flags & SRB_LOGIN_COND_PLOGI)
  1606. logio->control_flags |= cpu_to_le16(LCF_COND_PLOGI);
  1607. if (lio->u.logio.flags & SRB_LOGIN_SKIP_PRLI)
  1608. logio->control_flags |= cpu_to_le16(LCF_SKIP_PRLI);
  1609. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1610. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  1611. logio->port_id[1] = sp->fcport->d_id.b.area;
  1612. logio->port_id[2] = sp->fcport->d_id.b.domain;
  1613. logio->vp_index = sp->fcport->vha->vp_idx;
  1614. }
  1615. static void
  1616. qla2x00_login_iocb(srb_t *sp, struct mbx_entry *mbx)
  1617. {
  1618. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1619. struct srb_iocb *lio = &sp->u.iocb_cmd;
  1620. uint16_t opts;
  1621. mbx->entry_type = MBX_IOCB_TYPE;
  1622. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1623. mbx->mb0 = cpu_to_le16(MBC_LOGIN_FABRIC_PORT);
  1624. opts = lio->u.logio.flags & SRB_LOGIN_COND_PLOGI ? BIT_0 : 0;
  1625. opts |= lio->u.logio.flags & SRB_LOGIN_SKIP_PRLI ? BIT_1 : 0;
  1626. if (HAS_EXTENDED_IDS(ha)) {
  1627. mbx->mb1 = cpu_to_le16(sp->fcport->loop_id);
  1628. mbx->mb10 = cpu_to_le16(opts);
  1629. } else {
  1630. mbx->mb1 = cpu_to_le16((sp->fcport->loop_id << 8) | opts);
  1631. }
  1632. mbx->mb2 = cpu_to_le16(sp->fcport->d_id.b.domain);
  1633. mbx->mb3 = cpu_to_le16(sp->fcport->d_id.b.area << 8 |
  1634. sp->fcport->d_id.b.al_pa);
  1635. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1636. }
  1637. static void
  1638. qla24xx_logout_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1639. {
  1640. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1641. logio->control_flags =
  1642. cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO);
  1643. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1644. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  1645. logio->port_id[1] = sp->fcport->d_id.b.area;
  1646. logio->port_id[2] = sp->fcport->d_id.b.domain;
  1647. logio->vp_index = sp->fcport->vha->vp_idx;
  1648. }
  1649. static void
  1650. qla2x00_logout_iocb(srb_t *sp, struct mbx_entry *mbx)
  1651. {
  1652. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1653. mbx->entry_type = MBX_IOCB_TYPE;
  1654. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1655. mbx->mb0 = cpu_to_le16(MBC_LOGOUT_FABRIC_PORT);
  1656. mbx->mb1 = HAS_EXTENDED_IDS(ha) ?
  1657. cpu_to_le16(sp->fcport->loop_id):
  1658. cpu_to_le16(sp->fcport->loop_id << 8);
  1659. mbx->mb2 = cpu_to_le16(sp->fcport->d_id.b.domain);
  1660. mbx->mb3 = cpu_to_le16(sp->fcport->d_id.b.area << 8 |
  1661. sp->fcport->d_id.b.al_pa);
  1662. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1663. /* Implicit: mbx->mbx10 = 0. */
  1664. }
  1665. static void
  1666. qla24xx_adisc_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1667. {
  1668. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1669. logio->control_flags = cpu_to_le16(LCF_COMMAND_ADISC);
  1670. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1671. logio->vp_index = sp->fcport->vha->vp_idx;
  1672. }
  1673. static void
  1674. qla2x00_adisc_iocb(srb_t *sp, struct mbx_entry *mbx)
  1675. {
  1676. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1677. mbx->entry_type = MBX_IOCB_TYPE;
  1678. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1679. mbx->mb0 = cpu_to_le16(MBC_GET_PORT_DATABASE);
  1680. if (HAS_EXTENDED_IDS(ha)) {
  1681. mbx->mb1 = cpu_to_le16(sp->fcport->loop_id);
  1682. mbx->mb10 = cpu_to_le16(BIT_0);
  1683. } else {
  1684. mbx->mb1 = cpu_to_le16((sp->fcport->loop_id << 8) | BIT_0);
  1685. }
  1686. mbx->mb2 = cpu_to_le16(MSW(ha->async_pd_dma));
  1687. mbx->mb3 = cpu_to_le16(LSW(ha->async_pd_dma));
  1688. mbx->mb6 = cpu_to_le16(MSW(MSD(ha->async_pd_dma)));
  1689. mbx->mb7 = cpu_to_le16(LSW(MSD(ha->async_pd_dma)));
  1690. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1691. }
  1692. static void
  1693. qla24xx_tm_iocb(srb_t *sp, struct tsk_mgmt_entry *tsk)
  1694. {
  1695. uint32_t flags;
  1696. unsigned int lun;
  1697. struct fc_port *fcport = sp->fcport;
  1698. scsi_qla_host_t *vha = fcport->vha;
  1699. struct qla_hw_data *ha = vha->hw;
  1700. struct srb_iocb *iocb = &sp->u.iocb_cmd;
  1701. struct req_que *req = vha->req;
  1702. flags = iocb->u.tmf.flags;
  1703. lun = iocb->u.tmf.lun;
  1704. tsk->entry_type = TSK_MGMT_IOCB_TYPE;
  1705. tsk->entry_count = 1;
  1706. tsk->handle = MAKE_HANDLE(req->id, tsk->handle);
  1707. tsk->nport_handle = cpu_to_le16(fcport->loop_id);
  1708. tsk->timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
  1709. tsk->control_flags = cpu_to_le32(flags);
  1710. tsk->port_id[0] = fcport->d_id.b.al_pa;
  1711. tsk->port_id[1] = fcport->d_id.b.area;
  1712. tsk->port_id[2] = fcport->d_id.b.domain;
  1713. tsk->vp_index = fcport->vha->vp_idx;
  1714. if (flags == TCF_LUN_RESET) {
  1715. int_to_scsilun(lun, &tsk->lun);
  1716. host_to_fcp_swap((uint8_t *)&tsk->lun,
  1717. sizeof(tsk->lun));
  1718. }
  1719. }
  1720. static void
  1721. qla24xx_els_iocb(srb_t *sp, struct els_entry_24xx *els_iocb)
  1722. {
  1723. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1724. els_iocb->entry_type = ELS_IOCB_TYPE;
  1725. els_iocb->entry_count = 1;
  1726. els_iocb->sys_define = 0;
  1727. els_iocb->entry_status = 0;
  1728. els_iocb->handle = sp->handle;
  1729. els_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1730. els_iocb->tx_dsd_count = __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1731. els_iocb->vp_index = sp->fcport->vha->vp_idx;
  1732. els_iocb->sof_type = EST_SOFI3;
  1733. els_iocb->rx_dsd_count = __constant_cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  1734. els_iocb->opcode =
  1735. sp->type == SRB_ELS_CMD_RPT ?
  1736. bsg_job->request->rqst_data.r_els.els_code :
  1737. bsg_job->request->rqst_data.h_els.command_code;
  1738. els_iocb->port_id[0] = sp->fcport->d_id.b.al_pa;
  1739. els_iocb->port_id[1] = sp->fcport->d_id.b.area;
  1740. els_iocb->port_id[2] = sp->fcport->d_id.b.domain;
  1741. els_iocb->control_flags = 0;
  1742. els_iocb->rx_byte_count =
  1743. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1744. els_iocb->tx_byte_count =
  1745. cpu_to_le32(bsg_job->request_payload.payload_len);
  1746. els_iocb->tx_address[0] = cpu_to_le32(LSD(sg_dma_address
  1747. (bsg_job->request_payload.sg_list)));
  1748. els_iocb->tx_address[1] = cpu_to_le32(MSD(sg_dma_address
  1749. (bsg_job->request_payload.sg_list)));
  1750. els_iocb->tx_len = cpu_to_le32(sg_dma_len
  1751. (bsg_job->request_payload.sg_list));
  1752. els_iocb->rx_address[0] = cpu_to_le32(LSD(sg_dma_address
  1753. (bsg_job->reply_payload.sg_list)));
  1754. els_iocb->rx_address[1] = cpu_to_le32(MSD(sg_dma_address
  1755. (bsg_job->reply_payload.sg_list)));
  1756. els_iocb->rx_len = cpu_to_le32(sg_dma_len
  1757. (bsg_job->reply_payload.sg_list));
  1758. }
  1759. static void
  1760. qla2x00_ct_iocb(srb_t *sp, ms_iocb_entry_t *ct_iocb)
  1761. {
  1762. uint16_t avail_dsds;
  1763. uint32_t *cur_dsd;
  1764. struct scatterlist *sg;
  1765. int index;
  1766. uint16_t tot_dsds;
  1767. scsi_qla_host_t *vha = sp->fcport->vha;
  1768. struct qla_hw_data *ha = vha->hw;
  1769. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1770. int loop_iterartion = 0;
  1771. int cont_iocb_prsnt = 0;
  1772. int entry_count = 1;
  1773. memset(ct_iocb, 0, sizeof(ms_iocb_entry_t));
  1774. ct_iocb->entry_type = CT_IOCB_TYPE;
  1775. ct_iocb->entry_status = 0;
  1776. ct_iocb->handle1 = sp->handle;
  1777. SET_TARGET_ID(ha, ct_iocb->loop_id, sp->fcport->loop_id);
  1778. ct_iocb->status = __constant_cpu_to_le16(0);
  1779. ct_iocb->control_flags = __constant_cpu_to_le16(0);
  1780. ct_iocb->timeout = 0;
  1781. ct_iocb->cmd_dsd_count =
  1782. __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1783. ct_iocb->total_dsd_count =
  1784. __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt + 1);
  1785. ct_iocb->req_bytecount =
  1786. cpu_to_le32(bsg_job->request_payload.payload_len);
  1787. ct_iocb->rsp_bytecount =
  1788. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1789. ct_iocb->dseg_req_address[0] = cpu_to_le32(LSD(sg_dma_address
  1790. (bsg_job->request_payload.sg_list)));
  1791. ct_iocb->dseg_req_address[1] = cpu_to_le32(MSD(sg_dma_address
  1792. (bsg_job->request_payload.sg_list)));
  1793. ct_iocb->dseg_req_length = ct_iocb->req_bytecount;
  1794. ct_iocb->dseg_rsp_address[0] = cpu_to_le32(LSD(sg_dma_address
  1795. (bsg_job->reply_payload.sg_list)));
  1796. ct_iocb->dseg_rsp_address[1] = cpu_to_le32(MSD(sg_dma_address
  1797. (bsg_job->reply_payload.sg_list)));
  1798. ct_iocb->dseg_rsp_length = ct_iocb->rsp_bytecount;
  1799. avail_dsds = 1;
  1800. cur_dsd = (uint32_t *)ct_iocb->dseg_rsp_address;
  1801. index = 0;
  1802. tot_dsds = bsg_job->reply_payload.sg_cnt;
  1803. for_each_sg(bsg_job->reply_payload.sg_list, sg, tot_dsds, index) {
  1804. dma_addr_t sle_dma;
  1805. cont_a64_entry_t *cont_pkt;
  1806. /* Allocate additional continuation packets? */
  1807. if (avail_dsds == 0) {
  1808. /*
  1809. * Five DSDs are available in the Cont.
  1810. * Type 1 IOCB.
  1811. */
  1812. cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
  1813. vha->hw->req_q_map[0]);
  1814. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  1815. avail_dsds = 5;
  1816. cont_iocb_prsnt = 1;
  1817. entry_count++;
  1818. }
  1819. sle_dma = sg_dma_address(sg);
  1820. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  1821. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  1822. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1823. loop_iterartion++;
  1824. avail_dsds--;
  1825. }
  1826. ct_iocb->entry_count = entry_count;
  1827. }
  1828. static void
  1829. qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb)
  1830. {
  1831. uint16_t avail_dsds;
  1832. uint32_t *cur_dsd;
  1833. struct scatterlist *sg;
  1834. int index;
  1835. uint16_t tot_dsds;
  1836. scsi_qla_host_t *vha = sp->fcport->vha;
  1837. struct qla_hw_data *ha = vha->hw;
  1838. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1839. int loop_iterartion = 0;
  1840. int cont_iocb_prsnt = 0;
  1841. int entry_count = 1;
  1842. ct_iocb->entry_type = CT_IOCB_TYPE;
  1843. ct_iocb->entry_status = 0;
  1844. ct_iocb->sys_define = 0;
  1845. ct_iocb->handle = sp->handle;
  1846. ct_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1847. ct_iocb->vp_index = sp->fcport->vha->vp_idx;
  1848. ct_iocb->comp_status = __constant_cpu_to_le16(0);
  1849. ct_iocb->cmd_dsd_count =
  1850. __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1851. ct_iocb->timeout = 0;
  1852. ct_iocb->rsp_dsd_count =
  1853. __constant_cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  1854. ct_iocb->rsp_byte_count =
  1855. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1856. ct_iocb->cmd_byte_count =
  1857. cpu_to_le32(bsg_job->request_payload.payload_len);
  1858. ct_iocb->dseg_0_address[0] = cpu_to_le32(LSD(sg_dma_address
  1859. (bsg_job->request_payload.sg_list)));
  1860. ct_iocb->dseg_0_address[1] = cpu_to_le32(MSD(sg_dma_address
  1861. (bsg_job->request_payload.sg_list)));
  1862. ct_iocb->dseg_0_len = cpu_to_le32(sg_dma_len
  1863. (bsg_job->request_payload.sg_list));
  1864. avail_dsds = 1;
  1865. cur_dsd = (uint32_t *)ct_iocb->dseg_1_address;
  1866. index = 0;
  1867. tot_dsds = bsg_job->reply_payload.sg_cnt;
  1868. for_each_sg(bsg_job->reply_payload.sg_list, sg, tot_dsds, index) {
  1869. dma_addr_t sle_dma;
  1870. cont_a64_entry_t *cont_pkt;
  1871. /* Allocate additional continuation packets? */
  1872. if (avail_dsds == 0) {
  1873. /*
  1874. * Five DSDs are available in the Cont.
  1875. * Type 1 IOCB.
  1876. */
  1877. cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
  1878. ha->req_q_map[0]);
  1879. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  1880. avail_dsds = 5;
  1881. cont_iocb_prsnt = 1;
  1882. entry_count++;
  1883. }
  1884. sle_dma = sg_dma_address(sg);
  1885. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  1886. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  1887. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1888. loop_iterartion++;
  1889. avail_dsds--;
  1890. }
  1891. ct_iocb->entry_count = entry_count;
  1892. }
  1893. /*
  1894. * qla82xx_start_scsi() - Send a SCSI command to the ISP
  1895. * @sp: command to send to the ISP
  1896. *
  1897. * Returns non-zero if a failure occurred, else zero.
  1898. */
  1899. int
  1900. qla82xx_start_scsi(srb_t *sp)
  1901. {
  1902. int ret, nseg;
  1903. unsigned long flags;
  1904. struct scsi_cmnd *cmd;
  1905. uint32_t *clr_ptr;
  1906. uint32_t index;
  1907. uint32_t handle;
  1908. uint16_t cnt;
  1909. uint16_t req_cnt;
  1910. uint16_t tot_dsds;
  1911. struct device_reg_82xx __iomem *reg;
  1912. uint32_t dbval;
  1913. uint32_t *fcp_dl;
  1914. uint8_t additional_cdb_len;
  1915. struct ct6_dsd *ctx;
  1916. struct scsi_qla_host *vha = sp->fcport->vha;
  1917. struct qla_hw_data *ha = vha->hw;
  1918. struct req_que *req = NULL;
  1919. struct rsp_que *rsp = NULL;
  1920. char tag[2];
  1921. /* Setup device pointers. */
  1922. ret = 0;
  1923. reg = &ha->iobase->isp82;
  1924. cmd = GET_CMD_SP(sp);
  1925. req = vha->req;
  1926. rsp = ha->rsp_q_map[0];
  1927. /* So we know we haven't pci_map'ed anything yet */
  1928. tot_dsds = 0;
  1929. dbval = 0x04 | (ha->portnum << 5);
  1930. /* Send marker if required */
  1931. if (vha->marker_needed != 0) {
  1932. if (qla2x00_marker(vha, req,
  1933. rsp, 0, 0, MK_SYNC_ALL) != QLA_SUCCESS) {
  1934. ql_log(ql_log_warn, vha, 0x300c,
  1935. "qla2x00_marker failed for cmd=%p.\n", cmd);
  1936. return QLA_FUNCTION_FAILED;
  1937. }
  1938. vha->marker_needed = 0;
  1939. }
  1940. /* Acquire ring specific lock */
  1941. spin_lock_irqsave(&ha->hardware_lock, flags);
  1942. /* Check for room in outstanding command list. */
  1943. handle = req->current_outstanding_cmd;
  1944. for (index = 1; index < MAX_OUTSTANDING_COMMANDS; index++) {
  1945. handle++;
  1946. if (handle == MAX_OUTSTANDING_COMMANDS)
  1947. handle = 1;
  1948. if (!req->outstanding_cmds[handle])
  1949. break;
  1950. }
  1951. if (index == MAX_OUTSTANDING_COMMANDS)
  1952. goto queuing_error;
  1953. /* Map the sg table so we have an accurate count of sg entries needed */
  1954. if (scsi_sg_count(cmd)) {
  1955. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1956. scsi_sg_count(cmd), cmd->sc_data_direction);
  1957. if (unlikely(!nseg))
  1958. goto queuing_error;
  1959. } else
  1960. nseg = 0;
  1961. tot_dsds = nseg;
  1962. if (tot_dsds > ql2xshiftctondsd) {
  1963. struct cmd_type_6 *cmd_pkt;
  1964. uint16_t more_dsd_lists = 0;
  1965. struct dsd_dma *dsd_ptr;
  1966. uint16_t i;
  1967. more_dsd_lists = qla24xx_calc_dsd_lists(tot_dsds);
  1968. if ((more_dsd_lists + ha->gbl_dsd_inuse) >= NUM_DSD_CHAIN) {
  1969. ql_dbg(ql_dbg_io, vha, 0x300d,
  1970. "Num of DSD list %d is than %d for cmd=%p.\n",
  1971. more_dsd_lists + ha->gbl_dsd_inuse, NUM_DSD_CHAIN,
  1972. cmd);
  1973. goto queuing_error;
  1974. }
  1975. if (more_dsd_lists <= ha->gbl_dsd_avail)
  1976. goto sufficient_dsds;
  1977. else
  1978. more_dsd_lists -= ha->gbl_dsd_avail;
  1979. for (i = 0; i < more_dsd_lists; i++) {
  1980. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  1981. if (!dsd_ptr) {
  1982. ql_log(ql_log_fatal, vha, 0x300e,
  1983. "Failed to allocate memory for dsd_dma "
  1984. "for cmd=%p.\n", cmd);
  1985. goto queuing_error;
  1986. }
  1987. dsd_ptr->dsd_addr = dma_pool_alloc(ha->dl_dma_pool,
  1988. GFP_ATOMIC, &dsd_ptr->dsd_list_dma);
  1989. if (!dsd_ptr->dsd_addr) {
  1990. kfree(dsd_ptr);
  1991. ql_log(ql_log_fatal, vha, 0x300f,
  1992. "Failed to allocate memory for dsd_addr "
  1993. "for cmd=%p.\n", cmd);
  1994. goto queuing_error;
  1995. }
  1996. list_add_tail(&dsd_ptr->list, &ha->gbl_dsd_list);
  1997. ha->gbl_dsd_avail++;
  1998. }
  1999. sufficient_dsds:
  2000. req_cnt = 1;
  2001. if (req->cnt < (req_cnt + 2)) {
  2002. cnt = (uint16_t)RD_REG_DWORD_RELAXED(
  2003. &reg->req_q_out[0]);
  2004. if (req->ring_index < cnt)
  2005. req->cnt = cnt - req->ring_index;
  2006. else
  2007. req->cnt = req->length -
  2008. (req->ring_index - cnt);
  2009. if (req->cnt < (req_cnt + 2))
  2010. goto queuing_error;
  2011. }
  2012. ctx = sp->u.scmd.ctx =
  2013. mempool_alloc(ha->ctx_mempool, GFP_ATOMIC);
  2014. if (!ctx) {
  2015. ql_log(ql_log_fatal, vha, 0x3010,
  2016. "Failed to allocate ctx for cmd=%p.\n", cmd);
  2017. goto queuing_error;
  2018. }
  2019. memset(ctx, 0, sizeof(struct ct6_dsd));
  2020. ctx->fcp_cmnd = dma_pool_alloc(ha->fcp_cmnd_dma_pool,
  2021. GFP_ATOMIC, &ctx->fcp_cmnd_dma);
  2022. if (!ctx->fcp_cmnd) {
  2023. ql_log(ql_log_fatal, vha, 0x3011,
  2024. "Failed to allocate fcp_cmnd for cmd=%p.\n", cmd);
  2025. goto queuing_error;
  2026. }
  2027. /* Initialize the DSD list and dma handle */
  2028. INIT_LIST_HEAD(&ctx->dsd_list);
  2029. ctx->dsd_use_cnt = 0;
  2030. if (cmd->cmd_len > 16) {
  2031. additional_cdb_len = cmd->cmd_len - 16;
  2032. if ((cmd->cmd_len % 4) != 0) {
  2033. /* SCSI command bigger than 16 bytes must be
  2034. * multiple of 4
  2035. */
  2036. ql_log(ql_log_warn, vha, 0x3012,
  2037. "scsi cmd len %d not multiple of 4 "
  2038. "for cmd=%p.\n", cmd->cmd_len, cmd);
  2039. goto queuing_error_fcp_cmnd;
  2040. }
  2041. ctx->fcp_cmnd_len = 12 + cmd->cmd_len + 4;
  2042. } else {
  2043. additional_cdb_len = 0;
  2044. ctx->fcp_cmnd_len = 12 + 16 + 4;
  2045. }
  2046. cmd_pkt = (struct cmd_type_6 *)req->ring_ptr;
  2047. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2048. /* Zero out remaining portion of packet. */
  2049. /* tagged queuing modifier -- default is TSK_SIMPLE (0). */
  2050. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2051. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2052. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  2053. /* Set NPORT-ID and LUN number*/
  2054. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2055. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  2056. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  2057. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  2058. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  2059. /* Build IOCB segments */
  2060. if (qla24xx_build_scsi_type_6_iocbs(sp, cmd_pkt, tot_dsds))
  2061. goto queuing_error_fcp_cmnd;
  2062. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  2063. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  2064. /* build FCP_CMND IU */
  2065. memset(ctx->fcp_cmnd, 0, sizeof(struct fcp_cmnd));
  2066. int_to_scsilun(cmd->device->lun, &ctx->fcp_cmnd->lun);
  2067. ctx->fcp_cmnd->additional_cdb_len = additional_cdb_len;
  2068. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  2069. ctx->fcp_cmnd->additional_cdb_len |= 1;
  2070. else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
  2071. ctx->fcp_cmnd->additional_cdb_len |= 2;
  2072. /*
  2073. * Update tagged queuing modifier -- default is TSK_SIMPLE (0).
  2074. */
  2075. if (scsi_populate_tag_msg(cmd, tag)) {
  2076. switch (tag[0]) {
  2077. case HEAD_OF_QUEUE_TAG:
  2078. ctx->fcp_cmnd->task_attribute =
  2079. TSK_HEAD_OF_QUEUE;
  2080. break;
  2081. case ORDERED_QUEUE_TAG:
  2082. ctx->fcp_cmnd->task_attribute =
  2083. TSK_ORDERED;
  2084. break;
  2085. }
  2086. }
  2087. /* Populate the FCP_PRIO. */
  2088. if (ha->flags.fcp_prio_enabled)
  2089. ctx->fcp_cmnd->task_attribute |=
  2090. sp->fcport->fcp_prio << 3;
  2091. memcpy(ctx->fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len);
  2092. fcp_dl = (uint32_t *)(ctx->fcp_cmnd->cdb + 16 +
  2093. additional_cdb_len);
  2094. *fcp_dl = htonl((uint32_t)scsi_bufflen(cmd));
  2095. cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(ctx->fcp_cmnd_len);
  2096. cmd_pkt->fcp_cmnd_dseg_address[0] =
  2097. cpu_to_le32(LSD(ctx->fcp_cmnd_dma));
  2098. cmd_pkt->fcp_cmnd_dseg_address[1] =
  2099. cpu_to_le32(MSD(ctx->fcp_cmnd_dma));
  2100. sp->flags |= SRB_FCP_CMND_DMA_VALID;
  2101. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  2102. /* Set total data segment count. */
  2103. cmd_pkt->entry_count = (uint8_t)req_cnt;
  2104. /* Specify response queue number where
  2105. * completion should happen
  2106. */
  2107. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2108. } else {
  2109. struct cmd_type_7 *cmd_pkt;
  2110. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  2111. if (req->cnt < (req_cnt + 2)) {
  2112. cnt = (uint16_t)RD_REG_DWORD_RELAXED(
  2113. &reg->req_q_out[0]);
  2114. if (req->ring_index < cnt)
  2115. req->cnt = cnt - req->ring_index;
  2116. else
  2117. req->cnt = req->length -
  2118. (req->ring_index - cnt);
  2119. }
  2120. if (req->cnt < (req_cnt + 2))
  2121. goto queuing_error;
  2122. cmd_pkt = (struct cmd_type_7 *)req->ring_ptr;
  2123. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2124. /* Zero out remaining portion of packet. */
  2125. /* tagged queuing modifier -- default is TSK_SIMPLE (0).*/
  2126. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2127. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2128. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  2129. /* Set NPORT-ID and LUN number*/
  2130. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2131. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  2132. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  2133. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  2134. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  2135. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  2136. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun,
  2137. sizeof(cmd_pkt->lun));
  2138. /*
  2139. * Update tagged queuing modifier -- default is TSK_SIMPLE (0).
  2140. */
  2141. if (scsi_populate_tag_msg(cmd, tag)) {
  2142. switch (tag[0]) {
  2143. case HEAD_OF_QUEUE_TAG:
  2144. cmd_pkt->task = TSK_HEAD_OF_QUEUE;
  2145. break;
  2146. case ORDERED_QUEUE_TAG:
  2147. cmd_pkt->task = TSK_ORDERED;
  2148. break;
  2149. }
  2150. }
  2151. /* Populate the FCP_PRIO. */
  2152. if (ha->flags.fcp_prio_enabled)
  2153. cmd_pkt->task |= sp->fcport->fcp_prio << 3;
  2154. /* Load SCSI command packet. */
  2155. memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
  2156. host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
  2157. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  2158. /* Build IOCB segments */
  2159. qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds);
  2160. /* Set total data segment count. */
  2161. cmd_pkt->entry_count = (uint8_t)req_cnt;
  2162. /* Specify response queue number where
  2163. * completion should happen.
  2164. */
  2165. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2166. }
  2167. /* Build command packet. */
  2168. req->current_outstanding_cmd = handle;
  2169. req->outstanding_cmds[handle] = sp;
  2170. sp->handle = handle;
  2171. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  2172. req->cnt -= req_cnt;
  2173. wmb();
  2174. /* Adjust ring index. */
  2175. req->ring_index++;
  2176. if (req->ring_index == req->length) {
  2177. req->ring_index = 0;
  2178. req->ring_ptr = req->ring;
  2179. } else
  2180. req->ring_ptr++;
  2181. sp->flags |= SRB_DMA_VALID;
  2182. /* Set chip new ring index. */
  2183. /* write, read and verify logic */
  2184. dbval = dbval | (req->id << 8) | (req->ring_index << 16);
  2185. if (ql2xdbwr)
  2186. qla82xx_wr_32(ha, ha->nxdb_wr_ptr, dbval);
  2187. else {
  2188. WRT_REG_DWORD(
  2189. (unsigned long __iomem *)ha->nxdb_wr_ptr,
  2190. dbval);
  2191. wmb();
  2192. while (RD_REG_DWORD((void __iomem *)ha->nxdb_rd_ptr) != dbval) {
  2193. WRT_REG_DWORD(
  2194. (unsigned long __iomem *)ha->nxdb_wr_ptr,
  2195. dbval);
  2196. wmb();
  2197. }
  2198. }
  2199. /* Manage unprocessed RIO/ZIO commands in response queue. */
  2200. if (vha->flags.process_response_queue &&
  2201. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  2202. qla24xx_process_response_queue(vha, rsp);
  2203. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2204. return QLA_SUCCESS;
  2205. queuing_error_fcp_cmnd:
  2206. dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd, ctx->fcp_cmnd_dma);
  2207. queuing_error:
  2208. if (tot_dsds)
  2209. scsi_dma_unmap(cmd);
  2210. if (sp->u.scmd.ctx) {
  2211. mempool_free(sp->u.scmd.ctx, ha->ctx_mempool);
  2212. sp->u.scmd.ctx = NULL;
  2213. }
  2214. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2215. return QLA_FUNCTION_FAILED;
  2216. }
  2217. int
  2218. qla2x00_start_sp(srb_t *sp)
  2219. {
  2220. int rval;
  2221. struct qla_hw_data *ha = sp->fcport->vha->hw;
  2222. void *pkt;
  2223. unsigned long flags;
  2224. rval = QLA_FUNCTION_FAILED;
  2225. spin_lock_irqsave(&ha->hardware_lock, flags);
  2226. pkt = qla2x00_alloc_iocbs(sp->fcport->vha, sp);
  2227. if (!pkt) {
  2228. ql_log(ql_log_warn, sp->fcport->vha, 0x700c,
  2229. "qla2x00_alloc_iocbs failed.\n");
  2230. goto done;
  2231. }
  2232. rval = QLA_SUCCESS;
  2233. switch (sp->type) {
  2234. case SRB_LOGIN_CMD:
  2235. IS_FWI2_CAPABLE(ha) ?
  2236. qla24xx_login_iocb(sp, pkt) :
  2237. qla2x00_login_iocb(sp, pkt);
  2238. break;
  2239. case SRB_LOGOUT_CMD:
  2240. IS_FWI2_CAPABLE(ha) ?
  2241. qla24xx_logout_iocb(sp, pkt) :
  2242. qla2x00_logout_iocb(sp, pkt);
  2243. break;
  2244. case SRB_ELS_CMD_RPT:
  2245. case SRB_ELS_CMD_HST:
  2246. qla24xx_els_iocb(sp, pkt);
  2247. break;
  2248. case SRB_CT_CMD:
  2249. IS_FWI2_CAPABLE(ha) ?
  2250. qla24xx_ct_iocb(sp, pkt) :
  2251. qla2x00_ct_iocb(sp, pkt);
  2252. break;
  2253. case SRB_ADISC_CMD:
  2254. IS_FWI2_CAPABLE(ha) ?
  2255. qla24xx_adisc_iocb(sp, pkt) :
  2256. qla2x00_adisc_iocb(sp, pkt);
  2257. break;
  2258. case SRB_TM_CMD:
  2259. qla24xx_tm_iocb(sp, pkt);
  2260. break;
  2261. default:
  2262. break;
  2263. }
  2264. wmb();
  2265. qla2x00_start_iocbs(sp->fcport->vha, ha->req_q_map[0]);
  2266. done:
  2267. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2268. return rval;
  2269. }
  2270. static void
  2271. qla25xx_build_bidir_iocb(srb_t *sp, struct scsi_qla_host *vha,
  2272. struct cmd_bidir *cmd_pkt, uint32_t tot_dsds)
  2273. {
  2274. uint16_t avail_dsds;
  2275. uint32_t *cur_dsd;
  2276. uint32_t req_data_len = 0;
  2277. uint32_t rsp_data_len = 0;
  2278. struct scatterlist *sg;
  2279. int index;
  2280. int entry_count = 1;
  2281. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  2282. /*Update entry type to indicate bidir command */
  2283. *((uint32_t *)(&cmd_pkt->entry_type)) =
  2284. __constant_cpu_to_le32(COMMAND_BIDIRECTIONAL);
  2285. /* Set the transfer direction, in this set both flags
  2286. * Also set the BD_WRAP_BACK flag, firmware will take care
  2287. * assigning DID=SID for outgoing pkts.
  2288. */
  2289. cmd_pkt->wr_dseg_count = cpu_to_le16(bsg_job->request_payload.sg_cnt);
  2290. cmd_pkt->rd_dseg_count = cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  2291. cmd_pkt->control_flags =
  2292. __constant_cpu_to_le16(BD_WRITE_DATA | BD_READ_DATA |
  2293. BD_WRAP_BACK);
  2294. req_data_len = rsp_data_len = bsg_job->request_payload.payload_len;
  2295. cmd_pkt->wr_byte_count = cpu_to_le32(req_data_len);
  2296. cmd_pkt->rd_byte_count = cpu_to_le32(rsp_data_len);
  2297. cmd_pkt->timeout = cpu_to_le16(qla2x00_get_async_timeout(vha) + 2);
  2298. vha->bidi_stats.transfer_bytes += req_data_len;
  2299. vha->bidi_stats.io_count++;
  2300. /* Only one dsd is available for bidirectional IOCB, remaining dsds
  2301. * are bundled in continuation iocb
  2302. */
  2303. avail_dsds = 1;
  2304. cur_dsd = (uint32_t *)&cmd_pkt->fcp_data_dseg_address;
  2305. index = 0;
  2306. for_each_sg(bsg_job->request_payload.sg_list, sg,
  2307. bsg_job->request_payload.sg_cnt, index) {
  2308. dma_addr_t sle_dma;
  2309. cont_a64_entry_t *cont_pkt;
  2310. /* Allocate additional continuation packets */
  2311. if (avail_dsds == 0) {
  2312. /* Continuation type 1 IOCB can accomodate
  2313. * 5 DSDS
  2314. */
  2315. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  2316. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  2317. avail_dsds = 5;
  2318. entry_count++;
  2319. }
  2320. sle_dma = sg_dma_address(sg);
  2321. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  2322. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  2323. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  2324. avail_dsds--;
  2325. }
  2326. /* For read request DSD will always goes to continuation IOCB
  2327. * and follow the write DSD. If there is room on the current IOCB
  2328. * then it is added to that IOCB else new continuation IOCB is
  2329. * allocated.
  2330. */
  2331. for_each_sg(bsg_job->reply_payload.sg_list, sg,
  2332. bsg_job->reply_payload.sg_cnt, index) {
  2333. dma_addr_t sle_dma;
  2334. cont_a64_entry_t *cont_pkt;
  2335. /* Allocate additional continuation packets */
  2336. if (avail_dsds == 0) {
  2337. /* Continuation type 1 IOCB can accomodate
  2338. * 5 DSDS
  2339. */
  2340. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  2341. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  2342. avail_dsds = 5;
  2343. entry_count++;
  2344. }
  2345. sle_dma = sg_dma_address(sg);
  2346. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  2347. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  2348. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  2349. avail_dsds--;
  2350. }
  2351. /* This value should be same as number of IOCB required for this cmd */
  2352. cmd_pkt->entry_count = entry_count;
  2353. }
  2354. int
  2355. qla2x00_start_bidir(srb_t *sp, struct scsi_qla_host *vha, uint32_t tot_dsds)
  2356. {
  2357. struct qla_hw_data *ha = vha->hw;
  2358. unsigned long flags;
  2359. uint32_t handle;
  2360. uint32_t index;
  2361. uint16_t req_cnt;
  2362. uint16_t cnt;
  2363. uint32_t *clr_ptr;
  2364. struct cmd_bidir *cmd_pkt = NULL;
  2365. struct rsp_que *rsp;
  2366. struct req_que *req;
  2367. int rval = EXT_STATUS_OK;
  2368. device_reg_t __iomem *reg = ISP_QUE_REG(ha, vha->req->id);
  2369. rval = QLA_SUCCESS;
  2370. rsp = ha->rsp_q_map[0];
  2371. req = vha->req;
  2372. /* Send marker if required */
  2373. if (vha->marker_needed != 0) {
  2374. if (qla2x00_marker(vha, req,
  2375. rsp, 0, 0, MK_SYNC_ALL) != QLA_SUCCESS)
  2376. return EXT_STATUS_MAILBOX;
  2377. vha->marker_needed = 0;
  2378. }
  2379. /* Acquire ring specific lock */
  2380. spin_lock_irqsave(&ha->hardware_lock, flags);
  2381. /* Check for room in outstanding command list. */
  2382. handle = req->current_outstanding_cmd;
  2383. for (index = 1; index < MAX_OUTSTANDING_COMMANDS; index++) {
  2384. handle++;
  2385. if (handle == MAX_OUTSTANDING_COMMANDS)
  2386. handle = 1;
  2387. if (!req->outstanding_cmds[handle])
  2388. break;
  2389. }
  2390. if (index == MAX_OUTSTANDING_COMMANDS) {
  2391. rval = EXT_STATUS_BUSY;
  2392. goto queuing_error;
  2393. }
  2394. /* Calculate number of IOCB required */
  2395. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  2396. /* Check for room on request queue. */
  2397. if (req->cnt < req_cnt + 2) {
  2398. if (ha->mqenable)
  2399. cnt = RD_REG_DWORD(&reg->isp25mq.req_q_out);
  2400. else if (IS_QLA82XX(ha))
  2401. cnt = RD_REG_DWORD(&reg->isp82.req_q_out);
  2402. else if (IS_FWI2_CAPABLE(ha))
  2403. cnt = RD_REG_DWORD(&reg->isp24.req_q_out);
  2404. else
  2405. cnt = qla2x00_debounce_register(
  2406. ISP_REQ_Q_OUT(ha, &reg->isp));
  2407. if (req->ring_index < cnt)
  2408. req->cnt = cnt - req->ring_index;
  2409. else
  2410. req->cnt = req->length -
  2411. (req->ring_index - cnt);
  2412. }
  2413. if (req->cnt < req_cnt + 2) {
  2414. rval = EXT_STATUS_BUSY;
  2415. goto queuing_error;
  2416. }
  2417. cmd_pkt = (struct cmd_bidir *)req->ring_ptr;
  2418. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2419. /* Zero out remaining portion of packet. */
  2420. /* tagged queuing modifier -- default is TSK_SIMPLE (0).*/
  2421. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2422. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2423. /* Set NPORT-ID (of vha)*/
  2424. cmd_pkt->nport_handle = cpu_to_le16(vha->self_login_loop_id);
  2425. cmd_pkt->port_id[0] = vha->d_id.b.al_pa;
  2426. cmd_pkt->port_id[1] = vha->d_id.b.area;
  2427. cmd_pkt->port_id[2] = vha->d_id.b.domain;
  2428. qla25xx_build_bidir_iocb(sp, vha, cmd_pkt, tot_dsds);
  2429. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2430. /* Build command packet. */
  2431. req->current_outstanding_cmd = handle;
  2432. req->outstanding_cmds[handle] = sp;
  2433. sp->handle = handle;
  2434. req->cnt -= req_cnt;
  2435. /* Send the command to the firmware */
  2436. wmb();
  2437. qla2x00_start_iocbs(vha, req);
  2438. queuing_error:
  2439. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2440. return rval;
  2441. }