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@@ -136,18 +136,10 @@ struct ep93xx_spi {
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/**
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* struct ep93xx_spi_chip - SPI device hardware settings
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* @spi: back pointer to the SPI device
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- * @div_cpsr: cpsr (pre-scaler) divider
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- * @div_scr: scr divider
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* @ops: private chip operations
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- *
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- * This structure is used to store hardware register specific settings for each
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- * SPI device. Settings are written to hardware by function
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- * ep93xx_spi_chip_setup().
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*/
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struct ep93xx_spi_chip {
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const struct spi_device *spi;
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- u8 div_cpsr;
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- u8 div_scr;
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struct ep93xx_spi_chip_ops *ops;
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};
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@@ -224,17 +216,13 @@ static void ep93xx_spi_disable_interrupts(const struct ep93xx_spi *espi)
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/**
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* ep93xx_spi_calc_divisors() - calculates SPI clock divisors
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* @espi: ep93xx SPI controller struct
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- * @chip: divisors are calculated for this chip
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* @rate: desired SPI output clock rate
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- *
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- * Function calculates cpsr (clock pre-scaler) and scr divisors based on
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- * given @rate and places them to @chip->div_cpsr and @chip->div_scr. If,
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- * for some reason, divisors cannot be calculated nothing is stored and
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- * %-EINVAL is returned.
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+ * @div_cpsr: pointer to return the cpsr (pre-scaler) divider
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+ * @div_scr: pointer to return the scr divider
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*/
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static int ep93xx_spi_calc_divisors(const struct ep93xx_spi *espi,
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- struct ep93xx_spi_chip *chip,
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- unsigned long rate)
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+ unsigned long rate,
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+ u8 *div_cpsr, u8 *div_scr)
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{
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unsigned long spi_clk_rate = clk_get_rate(espi->clk);
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int cpsr, scr;
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@@ -257,8 +245,8 @@ static int ep93xx_spi_calc_divisors(const struct ep93xx_spi *espi,
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for (cpsr = 2; cpsr <= 254; cpsr += 2) {
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for (scr = 0; scr <= 255; scr++) {
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if ((spi_clk_rate / (cpsr * (scr + 1))) <= rate) {
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- chip->div_scr = (u8)scr;
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- chip->div_cpsr = (u8)cpsr;
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+ *div_scr = (u8)scr;
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+ *div_cpsr = (u8)cpsr;
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return 0;
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}
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}
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@@ -389,29 +377,35 @@ static void ep93xx_spi_cleanup(struct spi_device *spi)
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* ep93xx_spi_chip_setup() - configures hardware according to given @chip
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* @espi: ep93xx SPI controller struct
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* @chip: chip specific settings
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+ * @speed_hz: transfer speed
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* @bits_per_word: transfer bits_per_word
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- *
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- * This function sets up the actual hardware registers with settings given in
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- * @chip. Note that no validation is done so make sure that callers validate
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- * settings before calling this.
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*/
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-static void ep93xx_spi_chip_setup(const struct ep93xx_spi *espi,
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- const struct ep93xx_spi_chip *chip,
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- u8 bits_per_word)
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+static int ep93xx_spi_chip_setup(const struct ep93xx_spi *espi,
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+ const struct ep93xx_spi_chip *chip,
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+ u32 speed_hz, u8 bits_per_word)
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{
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u8 dss = bits_per_word_to_dss(bits_per_word);
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+ u8 div_cpsr = 0;
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+ u8 div_scr = 0;
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u16 cr0;
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+ int err;
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+
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+ err = ep93xx_spi_calc_divisors(espi, speed_hz, &div_cpsr, &div_scr);
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+ if (err)
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+ return err;
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- cr0 = chip->div_scr << SSPCR0_SCR_SHIFT;
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+ cr0 = div_scr << SSPCR0_SCR_SHIFT;
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cr0 |= (chip->spi->mode & (SPI_CPHA|SPI_CPOL)) << SSPCR0_MODE_SHIFT;
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cr0 |= dss;
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dev_dbg(&espi->pdev->dev, "setup: mode %d, cpsr %d, scr %d, dss %d\n",
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- chip->spi->mode, chip->div_cpsr, chip->div_scr, dss);
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+ chip->spi->mode, div_cpsr, div_scr, dss);
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dev_dbg(&espi->pdev->dev, "setup: cr0 %#x", cr0);
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- ep93xx_spi_write_u8(espi, SSPCPSR, chip->div_cpsr);
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+ ep93xx_spi_write_u8(espi, SSPCPSR, div_cpsr);
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ep93xx_spi_write_u16(espi, SSPCR0, cr0);
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+
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+ return 0;
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}
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static void ep93xx_do_write(struct ep93xx_spi *espi, struct spi_transfer *t)
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@@ -687,15 +681,14 @@ static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi,
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msg->state = t;
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- err = ep93xx_spi_calc_divisors(espi, chip, t->speed_hz);
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+ err = ep93xx_spi_chip_setup(espi, chip, t->speed_hz, t->bits_per_word);
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if (err) {
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- dev_err(&espi->pdev->dev, "failed to adjust speed\n");
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+ dev_err(&espi->pdev->dev,
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+ "failed to setup chip for transfer\n");
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msg->status = err;
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return;
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}
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- ep93xx_spi_chip_setup(espi, chip, t->bits_per_word);
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-
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espi->rx = 0;
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espi->tx = 0;
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