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@@ -136,7 +136,6 @@ struct ep93xx_spi {
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/**
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* struct ep93xx_spi_chip - SPI device hardware settings
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* @spi: back pointer to the SPI device
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- * @rate: max rate in hz this chip supports
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* @div_cpsr: cpsr (pre-scaler) divider
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* @div_scr: scr divider
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* @ops: private chip operations
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@@ -147,7 +146,6 @@ struct ep93xx_spi {
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*/
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struct ep93xx_spi_chip {
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const struct spi_device *spi;
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- unsigned long rate;
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u8 div_cpsr;
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u8 div_scr;
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struct ep93xx_spi_chip_ops *ops;
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@@ -315,18 +313,6 @@ static int ep93xx_spi_setup(struct spi_device *spi)
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spi_set_ctldata(spi, chip);
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}
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- if (spi->max_speed_hz != chip->rate) {
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- int err;
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-
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- err = ep93xx_spi_calc_divisors(espi, chip, spi->max_speed_hz);
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- if (err != 0) {
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- spi_set_ctldata(spi, NULL);
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- kfree(chip);
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- return err;
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- }
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- chip->rate = spi->max_speed_hz;
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- }
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-
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ep93xx_spi_cs_control(spi, false);
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return 0;
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}
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