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ARM: exynos: remove incorrect BSYM usage

BSYM macro is only needed for assembly files and its usage in c files is
wrong, so remove it. The linker will correctly set bit 0 for Thumb2
kernels.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Dave Martin <dave.martin@linaro.org>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Rob Herring 13 年之前
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共有 2 个文件被更改,包括 4 次插入3 次删除
  1. 2 0
      arch/arm/mach-exynos/headsmp.S
  2. 2 3
      arch/arm/mach-exynos/platsmp.c

+ 2 - 0
arch/arm/mach-exynos/headsmp.S

@@ -36,6 +36,8 @@ pen:	ldr	r7, [r6]
 	 * should now contain the SVC stack for this core
 	 * should now contain the SVC stack for this core
 	 */
 	 */
 	b	secondary_startup
 	b	secondary_startup
+ENDPROC(exynos4_secondary_startup)
 
 
+	.align 2
 1:	.long	.
 1:	.long	.
 	.long	pen_release
 	.long	pen_release

+ 2 - 3
arch/arm/mach-exynos/platsmp.c

@@ -24,7 +24,6 @@
 #include <asm/cacheflush.h>
 #include <asm/cacheflush.h>
 #include <asm/hardware/gic.h>
 #include <asm/hardware/gic.h>
 #include <asm/smp_scu.h>
 #include <asm/smp_scu.h>
-#include <asm/unified.h>
 
 
 #include <mach/hardware.h>
 #include <mach/hardware.h>
 #include <mach/regs-clock.h>
 #include <mach/regs-clock.h>
@@ -163,7 +162,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
 	while (time_before(jiffies, timeout)) {
 	while (time_before(jiffies, timeout)) {
 		smp_rmb();
 		smp_rmb();
 
 
-		__raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)),
+		__raw_writel(virt_to_phys(exynos4_secondary_startup),
 			CPU1_BOOT_REG);
 			CPU1_BOOT_REG);
 		gic_raise_softirq(cpumask_of(cpu), 1);
 		gic_raise_softirq(cpumask_of(cpu), 1);
 
 
@@ -218,6 +217,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
 	 * until it receives a soft interrupt, and then the
 	 * until it receives a soft interrupt, and then the
 	 * secondary CPU branches to this address.
 	 * secondary CPU branches to this address.
 	 */
 	 */
-	__raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)),
+	__raw_writel(virt_to_phys(exynos4_secondary_startup),
 			CPU1_BOOT_REG);
 			CPU1_BOOT_REG);
 }
 }