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@@ -25,6 +25,11 @@
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#define QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF 2048
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#define QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF 512
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+#define QLC_83XX_VF_RESET_FAIL_THRESH 8
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+#define QLC_BC_CMD_MAX_RETRY_CNT 5
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+
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+static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *);
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+static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *);
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static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *);
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static int qlcnic_sriov_vf_mbx_op(struct qlcnic_adapter *,
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struct qlcnic_cmd_args *);
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@@ -64,7 +69,7 @@ static struct qlcnic_hardware_ops qlcnic_sriov_vf_hw_ops = {
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static struct qlcnic_nic_template qlcnic_sriov_vf_ops = {
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.config_bridged_mode = qlcnic_config_bridged_mode,
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.config_led = qlcnic_config_led,
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- .cancel_idc_work = qlcnic_83xx_idc_exit,
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+ .cancel_idc_work = qlcnic_sriov_vf_cancel_fw_work,
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.napi_add = qlcnic_83xx_napi_add,
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.napi_del = qlcnic_83xx_napi_del,
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.config_ipaddr = qlcnic_83xx_config_ipaddr,
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@@ -442,6 +447,8 @@ static int qlcnic_sriov_setup_vf(struct qlcnic_adapter *adapter,
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pci_set_drvdata(adapter->pdev, adapter);
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dev_info(&adapter->pdev->dev, "%s: XGbE port initialized\n",
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adapter->netdev->name);
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+ qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
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+ adapter->ahw->idc.delay);
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return 0;
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err_out_send_channel_term:
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@@ -461,27 +468,47 @@ err_out_disable_msi:
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return err;
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}
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+static int qlcnic_sriov_check_dev_ready(struct qlcnic_adapter *adapter)
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+{
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+ u32 state;
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+
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+ do {
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+ msleep(20);
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+ if (++adapter->fw_fail_cnt > QLC_BC_CMD_MAX_RETRY_CNT)
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+ return -EIO;
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+ state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
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+ } while (state != QLC_83XX_IDC_DEV_READY);
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+
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+ return 0;
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+}
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+
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int qlcnic_sriov_vf_init(struct qlcnic_adapter *adapter, int pci_using_dac)
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{
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struct qlcnic_hardware_context *ahw = adapter->ahw;
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+ int err;
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spin_lock_init(&ahw->mbx_lock);
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- set_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status);
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+ set_bit(QLC_83XX_MBX_READY, &ahw->idc.status);
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+ set_bit(QLC_83XX_MODULE_LOADED, &ahw->idc.status);
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+ ahw->idc.delay = QLC_83XX_IDC_FW_POLL_DELAY;
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+ ahw->reset_context = 0;
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+ adapter->fw_fail_cnt = 0;
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ahw->msix_supported = 1;
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+ adapter->need_fw_reset = 0;
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adapter->flags |= QLCNIC_TX_INTR_SHARED;
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- if (qlcnic_sriov_setup_vf(adapter, pci_using_dac))
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- return -EIO;
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+ err = qlcnic_sriov_check_dev_ready(adapter);
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+ if (err)
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+ return err;
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+
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+ err = qlcnic_sriov_setup_vf(adapter, pci_using_dac);
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+ if (err)
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+ return err;
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if (qlcnic_read_mac_addr(adapter))
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dev_warn(&adapter->pdev->dev, "failed to read mac addr\n");
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- set_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status);
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- adapter->ahw->idc.delay = QLC_83XX_IDC_FW_POLL_DELAY;
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- adapter->ahw->reset_context = 0;
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- adapter->fw_fail_cnt = 0;
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clear_bit(__QLCNIC_RESETTING, &adapter->state);
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- adapter->need_fw_reset = 0;
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return 0;
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}
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@@ -689,7 +716,8 @@ static void qlcnic_sriov_schedule_bc_cmd(struct qlcnic_sriov *sriov,
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struct qlcnic_vf_info *vf,
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work_func_t func)
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{
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- if (test_bit(QLC_BC_VF_FLR, &vf->state))
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+ if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
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+ vf->adapter->need_fw_reset)
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return;
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INIT_WORK(&vf->trans_work, func);
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@@ -813,7 +841,8 @@ static int __qlcnic_sriov_send_bc_msg(struct qlcnic_bc_trans *trans,
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int err = -EIO;
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while (flag) {
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- if (test_bit(QLC_BC_VF_FLR, &vf->state))
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+ if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
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+ vf->adapter->need_fw_reset)
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trans->trans_state = QLC_ABORT;
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switch (trans->trans_state) {
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@@ -897,6 +926,9 @@ static void qlcnic_sriov_process_bc_cmd(struct work_struct *work)
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struct qlcnic_cmd_args cmd;
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u8 req;
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+ if (adapter->need_fw_reset)
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+ return;
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+
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if (test_bit(QLC_BC_VF_FLR, &vf->state))
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return;
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@@ -1036,6 +1068,9 @@ static void qlcnic_sriov_handle_bc_cmd(struct qlcnic_sriov *sriov,
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int err;
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u8 cmd_op;
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+ if (adapter->need_fw_reset)
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+ return;
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+
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if (!test_bit(QLC_BC_VF_STATE, &vf->state) &&
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hdr->op_type != QLC_BC_CMD &&
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hdr->cmd_op != QLCNIC_BC_CMD_CHANNEL_INIT)
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@@ -1183,33 +1218,66 @@ int qlcnic_sriov_cfg_bc_intr(struct qlcnic_adapter *adapter, u8 enable)
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return err;
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}
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+static int qlcnic_sriov_retry_bc_cmd(struct qlcnic_adapter *adapter,
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+ struct qlcnic_bc_trans *trans)
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+{
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+ u8 max = QLC_BC_CMD_MAX_RETRY_CNT;
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+ u32 state;
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+
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+ state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
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+ if (state == QLC_83XX_IDC_DEV_READY) {
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+ msleep(20);
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+ clear_bit(QLC_BC_VF_CHANNEL, &trans->vf->state);
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+ trans->trans_state = QLC_INIT;
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+ if (++adapter->fw_fail_cnt > max)
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+ return -EIO;
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+ else
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+ return 0;
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+ }
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+
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+ return -EIO;
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+}
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+
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static int qlcnic_sriov_vf_mbx_op(struct qlcnic_adapter *adapter,
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struct qlcnic_cmd_args *cmd)
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{
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+ struct qlcnic_hardware_context *ahw = adapter->ahw;
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+ struct device *dev = &adapter->pdev->dev;
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struct qlcnic_bc_trans *trans;
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int err;
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u32 rsp_data, opcode, mbx_err_code, rsp;
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u16 seq = ++adapter->ahw->sriov->bc.trans_counter;
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+ u8 func = ahw->pci_func;
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- if (qlcnic_sriov_alloc_bc_trans(&trans))
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- return -ENOMEM;
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+ rsp = qlcnic_sriov_alloc_bc_trans(&trans);
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+ if (rsp)
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+ return rsp;
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- if (qlcnic_sriov_prepare_bc_hdr(trans, cmd, seq, QLC_BC_COMMAND))
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- return -ENOMEM;
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+ rsp = qlcnic_sriov_prepare_bc_hdr(trans, cmd, seq, QLC_BC_COMMAND);
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+ if (rsp)
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+ goto cleanup_transaction;
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+retry:
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if (!test_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status)) {
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rsp = -EIO;
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QLCDB(adapter, DRV, "MBX not Ready!(cmd 0x%x) for VF 0x%x\n",
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- QLCNIC_MBX_RSP(cmd->req.arg[0]), adapter->ahw->pci_func);
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+ QLCNIC_MBX_RSP(cmd->req.arg[0]), func);
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goto err_out;
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}
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- err = qlcnic_sriov_send_bc_cmd(adapter, trans, adapter->ahw->pci_func);
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+ err = qlcnic_sriov_send_bc_cmd(adapter, trans, func);
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if (err) {
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- dev_err(&adapter->pdev->dev,
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- "MBX command 0x%x timed out for VF %d\n",
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- (cmd->req.arg[0] & 0xffff), adapter->ahw->pci_func);
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+ dev_err(dev, "MBX command 0x%x timed out for VF %d\n",
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+ (cmd->req.arg[0] & 0xffff), func);
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rsp = QLCNIC_RCODE_TIMEOUT;
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+
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+ /* After adapter reset PF driver may take some time to
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+ * respond to VF's request. Retry request till maximum retries.
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+ */
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+ if ((trans->req_hdr->cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT) &&
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+ !qlcnic_sriov_retry_bc_cmd(adapter, trans))
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+ goto retry;
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+
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goto err_out;
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}
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@@ -1224,12 +1292,19 @@ static int qlcnic_sriov_vf_mbx_op(struct qlcnic_adapter *adapter,
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rsp = mbx_err_code;
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if (!rsp)
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rsp = 1;
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- dev_err(&adapter->pdev->dev,
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+ dev_err(dev,
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"MBX command 0x%x failed with err:0x%x for VF %d\n",
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- opcode, mbx_err_code, adapter->ahw->pci_func);
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+ opcode, mbx_err_code, func);
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}
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err_out:
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+ if (rsp == QLCNIC_RCODE_TIMEOUT) {
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+ ahw->reset_context = 1;
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+ adapter->need_fw_reset = 1;
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+ clear_bit(QLC_83XX_MBX_READY, &ahw->idc.status);
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+ }
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+
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+cleanup_transaction:
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qlcnic_sriov_cleanup_transaction(trans);
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return rsp;
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}
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@@ -1372,6 +1447,271 @@ void qlcnic_sriov_vf_schedule_multi(struct net_device *netdev)
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struct qlcnic_adapter *adapter = netdev_priv(netdev);
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struct qlcnic_back_channel *bc = &adapter->ahw->sriov->bc;
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+ if (adapter->need_fw_reset)
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+ return;
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+
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qlcnic_sriov_schedule_bc_async_work(bc, qlcnic_sriov_handle_async_multi,
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netdev);
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}
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+
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+static int qlcnic_sriov_vf_reinit_driver(struct qlcnic_adapter *adapter)
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+{
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+ int err;
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+
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+ set_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status);
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+ qlcnic_83xx_enable_mbx_intrpt(adapter);
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+
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+ err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
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+ if (err)
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+ return err;
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+
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+ err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
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+ if (err)
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+ goto err_out_cleanup_bc_intr;
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+
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+ err = qlcnic_sriov_vf_init_driver(adapter);
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+ if (err)
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+ goto err_out_term_channel;
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+
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+ return 0;
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+
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+err_out_term_channel:
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+ qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
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+
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+err_out_cleanup_bc_intr:
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+ qlcnic_sriov_cfg_bc_intr(adapter, 0);
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+ return err;
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+}
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+
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+static void qlcnic_sriov_vf_attach(struct qlcnic_adapter *adapter)
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+{
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+ struct net_device *netdev = adapter->netdev;
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+
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+ if (netif_running(netdev)) {
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+ if (!qlcnic_up(adapter, netdev))
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+ qlcnic_restore_indev_addr(netdev, NETDEV_UP);
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+ }
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+
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+ netif_device_attach(netdev);
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+}
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+
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+static void qlcnic_sriov_vf_detach(struct qlcnic_adapter *adapter)
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+{
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+ struct qlcnic_hardware_context *ahw = adapter->ahw;
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+ struct qlcnic_intrpt_config *intr_tbl = ahw->intr_tbl;
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+ struct net_device *netdev = adapter->netdev;
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+ u8 i, max_ints = ahw->num_msix - 1;
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+
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+ qlcnic_83xx_disable_mbx_intr(adapter);
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+ netif_device_detach(netdev);
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+ if (netif_running(netdev))
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+ qlcnic_down(adapter, netdev);
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+
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+ for (i = 0; i < max_ints; i++) {
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+ intr_tbl[i].id = i;
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+ intr_tbl[i].enabled = 0;
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+ intr_tbl[i].src = 0;
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+ }
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+ ahw->reset_context = 0;
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+}
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+
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+static int qlcnic_sriov_vf_handle_dev_ready(struct qlcnic_adapter *adapter)
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+{
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+ struct qlcnic_hardware_context *ahw = adapter->ahw;
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+ struct device *dev = &adapter->pdev->dev;
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+ struct qlc_83xx_idc *idc = &ahw->idc;
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+ u8 func = ahw->pci_func;
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+ u32 state;
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+
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+ if ((idc->prev_state == QLC_83XX_IDC_DEV_NEED_RESET) ||
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+ (idc->prev_state == QLC_83XX_IDC_DEV_INIT)) {
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+ if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
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+ qlcnic_sriov_vf_attach(adapter);
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+ adapter->fw_fail_cnt = 0;
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+ dev_info(dev,
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+ "%s: Reinitalization of VF 0x%x done after FW reset\n",
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+ __func__, func);
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+ } else {
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+ dev_err(dev,
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+ "%s: Reinitialization of VF 0x%x failed after FW reset\n",
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+ __func__, func);
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+ state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
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+ dev_info(dev, "Current state 0x%x after FW reset\n",
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+ state);
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+ }
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+ }
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+
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+ return 0;
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+}
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+
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+static int qlcnic_sriov_vf_handle_context_reset(struct qlcnic_adapter *adapter)
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+{
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+ struct qlcnic_hardware_context *ahw = adapter->ahw;
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+ struct device *dev = &adapter->pdev->dev;
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+ struct qlc_83xx_idc *idc = &ahw->idc;
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+ u8 func = ahw->pci_func;
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+ u32 state;
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+
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+ adapter->reset_ctx_cnt++;
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+
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+ /* Skip the context reset and check if FW is hung */
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+ if (adapter->reset_ctx_cnt < 3) {
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+ adapter->need_fw_reset = 1;
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+ clear_bit(QLC_83XX_MBX_READY, &idc->status);
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+ dev_info(dev,
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+ "Resetting context, wait here to check if FW is in failed state\n");
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+ return 0;
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+ }
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+
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+ /* Check if number of resets exceed the threshold.
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+ * If it exceeds the threshold just fail the VF.
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+ */
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+ if (adapter->reset_ctx_cnt > QLC_83XX_VF_RESET_FAIL_THRESH) {
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+ clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
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+ adapter->tx_timeo_cnt = 0;
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+ adapter->fw_fail_cnt = 0;
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+ adapter->reset_ctx_cnt = 0;
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+ qlcnic_sriov_vf_detach(adapter);
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+ dev_err(dev,
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+ "Device context resets have exceeded the threshold, device interface will be shutdown\n");
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+ return -EIO;
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+ }
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+
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+ dev_info(dev, "Resetting context of VF 0x%x\n", func);
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+ dev_info(dev, "%s: Context reset count %d for VF 0x%x\n",
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+ __func__, adapter->reset_ctx_cnt, func);
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+ set_bit(__QLCNIC_RESETTING, &adapter->state);
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+ adapter->need_fw_reset = 1;
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+ clear_bit(QLC_83XX_MBX_READY, &idc->status);
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|
|
+ qlcnic_sriov_vf_detach(adapter);
|
|
|
+ adapter->need_fw_reset = 0;
|
|
|
+
|
|
|
+ if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
|
|
|
+ qlcnic_sriov_vf_attach(adapter);
|
|
|
+ adapter->netdev->trans_start = jiffies;
|
|
|
+ adapter->tx_timeo_cnt = 0;
|
|
|
+ adapter->reset_ctx_cnt = 0;
|
|
|
+ adapter->fw_fail_cnt = 0;
|
|
|
+ dev_info(dev, "Done resetting context for VF 0x%x\n", func);
|
|
|
+ } else {
|
|
|
+ dev_err(dev, "%s: Reinitialization of VF 0x%x failed\n",
|
|
|
+ __func__, func);
|
|
|
+ state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
|
|
|
+ dev_info(dev, "%s: Current state 0x%x\n", __func__, state);
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int qlcnic_sriov_vf_idc_ready_state(struct qlcnic_adapter *adapter)
|
|
|
+{
|
|
|
+ struct qlcnic_hardware_context *ahw = adapter->ahw;
|
|
|
+ int ret = 0;
|
|
|
+
|
|
|
+ if (ahw->idc.prev_state != QLC_83XX_IDC_DEV_READY)
|
|
|
+ ret = qlcnic_sriov_vf_handle_dev_ready(adapter);
|
|
|
+ else if (ahw->reset_context)
|
|
|
+ ret = qlcnic_sriov_vf_handle_context_reset(adapter);
|
|
|
+
|
|
|
+ clear_bit(__QLCNIC_RESETTING, &adapter->state);
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static int qlcnic_sriov_vf_idc_failed_state(struct qlcnic_adapter *adapter)
|
|
|
+{
|
|
|
+ struct qlc_83xx_idc *idc = &adapter->ahw->idc;
|
|
|
+
|
|
|
+ dev_err(&adapter->pdev->dev, "Device is in failed state\n");
|
|
|
+ if (idc->prev_state == QLC_83XX_IDC_DEV_READY)
|
|
|
+ qlcnic_sriov_vf_detach(adapter);
|
|
|
+
|
|
|
+ clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
|
|
|
+ clear_bit(__QLCNIC_RESETTING, &adapter->state);
|
|
|
+ return -EIO;
|
|
|
+}
|
|
|
+
|
|
|
+static int
|
|
|
+qlcnic_sriov_vf_idc_need_quiescent_state(struct qlcnic_adapter *adapter)
|
|
|
+{
|
|
|
+ struct qlc_83xx_idc *idc = &adapter->ahw->idc;
|
|
|
+
|
|
|
+ dev_info(&adapter->pdev->dev, "Device is in quiescent state\n");
|
|
|
+ if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
|
|
|
+ set_bit(__QLCNIC_RESETTING, &adapter->state);
|
|
|
+ adapter->tx_timeo_cnt = 0;
|
|
|
+ adapter->reset_ctx_cnt = 0;
|
|
|
+ clear_bit(QLC_83XX_MBX_READY, &idc->status);
|
|
|
+ qlcnic_sriov_vf_detach(adapter);
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int qlcnic_sriov_vf_idc_init_reset_state(struct qlcnic_adapter *adapter)
|
|
|
+{
|
|
|
+ struct qlc_83xx_idc *idc = &adapter->ahw->idc;
|
|
|
+ u8 func = adapter->ahw->pci_func;
|
|
|
+
|
|
|
+ if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
|
|
|
+ dev_err(&adapter->pdev->dev,
|
|
|
+ "Firmware hang detected by VF 0x%x\n", func);
|
|
|
+ set_bit(__QLCNIC_RESETTING, &adapter->state);
|
|
|
+ adapter->tx_timeo_cnt = 0;
|
|
|
+ adapter->reset_ctx_cnt = 0;
|
|
|
+ clear_bit(QLC_83XX_MBX_READY, &idc->status);
|
|
|
+ qlcnic_sriov_vf_detach(adapter);
|
|
|
+ }
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int qlcnic_sriov_vf_idc_unknown_state(struct qlcnic_adapter *adapter)
|
|
|
+{
|
|
|
+ dev_err(&adapter->pdev->dev, "%s: Device in unknown state\n", __func__);
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *work)
|
|
|
+{
|
|
|
+ struct qlcnic_adapter *adapter;
|
|
|
+ struct qlc_83xx_idc *idc;
|
|
|
+ int ret = 0;
|
|
|
+
|
|
|
+ adapter = container_of(work, struct qlcnic_adapter, fw_work.work);
|
|
|
+ idc = &adapter->ahw->idc;
|
|
|
+ idc->curr_state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
|
|
|
+
|
|
|
+ switch (idc->curr_state) {
|
|
|
+ case QLC_83XX_IDC_DEV_READY:
|
|
|
+ ret = qlcnic_sriov_vf_idc_ready_state(adapter);
|
|
|
+ break;
|
|
|
+ case QLC_83XX_IDC_DEV_NEED_RESET:
|
|
|
+ case QLC_83XX_IDC_DEV_INIT:
|
|
|
+ ret = qlcnic_sriov_vf_idc_init_reset_state(adapter);
|
|
|
+ break;
|
|
|
+ case QLC_83XX_IDC_DEV_NEED_QUISCENT:
|
|
|
+ ret = qlcnic_sriov_vf_idc_need_quiescent_state(adapter);
|
|
|
+ break;
|
|
|
+ case QLC_83XX_IDC_DEV_FAILED:
|
|
|
+ ret = qlcnic_sriov_vf_idc_failed_state(adapter);
|
|
|
+ break;
|
|
|
+ case QLC_83XX_IDC_DEV_QUISCENT:
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ ret = qlcnic_sriov_vf_idc_unknown_state(adapter);
|
|
|
+ }
|
|
|
+
|
|
|
+ idc->prev_state = idc->curr_state;
|
|
|
+ if (!ret && test_bit(QLC_83XX_MODULE_LOADED, &idc->status))
|
|
|
+ qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
|
|
|
+ idc->delay);
|
|
|
+}
|
|
|
+
|
|
|
+static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *adapter)
|
|
|
+{
|
|
|
+ while (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
|
|
|
+ msleep(20);
|
|
|
+
|
|
|
+ clear_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status);
|
|
|
+ clear_bit(__QLCNIC_RESETTING, &adapter->state);
|
|
|
+ cancel_delayed_work_sync(&adapter->fw_work);
|
|
|
+}
|