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@@ -99,8 +99,7 @@ static void rt2800_bbp_write(struct rt2x00_dev *rt2x00dev,
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rt2x00_set_field32(®, BBP_CSR_CFG_REGNUM, word);
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rt2x00_set_field32(®, BBP_CSR_CFG_BUSY, 1);
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rt2x00_set_field32(®, BBP_CSR_CFG_READ_CONTROL, 0);
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- if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev))
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- rt2x00_set_field32(®, BBP_CSR_CFG_BBP_RW_MODE, 1);
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+ rt2x00_set_field32(®, BBP_CSR_CFG_BBP_RW_MODE, 1);
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rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
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}
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@@ -128,8 +127,7 @@ static void rt2800_bbp_read(struct rt2x00_dev *rt2x00dev,
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rt2x00_set_field32(®, BBP_CSR_CFG_REGNUM, word);
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rt2x00_set_field32(®, BBP_CSR_CFG_BUSY, 1);
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rt2x00_set_field32(®, BBP_CSR_CFG_READ_CONTROL, 1);
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- if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev))
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- rt2x00_set_field32(®, BBP_CSR_CFG_BBP_RW_MODE, 1);
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+ rt2x00_set_field32(®, BBP_CSR_CFG_BBP_RW_MODE, 1);
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rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
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