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@@ -382,32 +382,86 @@ static void pch_gbe_mac_mar_set(struct pch_gbe_hw *hw, u8 * addr, u32 index)
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pch_gbe_wait_clr_bit(&hw->reg->ADDR_MASK, PCH_GBE_BUSY);
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}
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+/**
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+ * pch_gbe_mac_save_mac_addr_regs - Save MAC addresse registers
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+ * @hw: Pointer to the HW structure
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+ * @addr: Pointer to the MAC address
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+ * @index: MAC address array register
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+ */
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+static void
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+pch_gbe_mac_save_mac_addr_regs(struct pch_gbe_hw *hw,
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+ struct pch_gbe_regs_mac_adr *mac_adr, u32 index)
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+{
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+ mac_adr->high = ioread32(&hw->reg->mac_adr[index].high);
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+ mac_adr->low = ioread32(&hw->reg->mac_adr[index].low);
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+}
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+
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+/**
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+ * pch_gbe_mac_store_mac_addr_regs - Store MAC addresse registers
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+ * @hw: Pointer to the HW structure
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+ * @addr: Pointer to the MAC address
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+ * @index: MAC address array register
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+ */
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+static void
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+pch_gbe_mac_store_mac_addr_regs(struct pch_gbe_hw *hw,
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+ struct pch_gbe_regs_mac_adr *mac_adr, u32 index)
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+{
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+ u32 adrmask;
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+
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+ adrmask = ioread32(&hw->reg->ADDR_MASK);
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+ iowrite32((adrmask | (0x0001 << index)), &hw->reg->ADDR_MASK);
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+ /* wait busy */
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+ pch_gbe_wait_clr_bit(&hw->reg->ADDR_MASK, PCH_GBE_BUSY);
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+ /* Set the MAC address to the MAC address xA/xB register */
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+ iowrite32(mac_adr->high, &hw->reg->mac_adr[index].high);
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+ iowrite32(mac_adr->low, &hw->reg->mac_adr[index].low);
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+ iowrite32((adrmask & ~(0x0001 << index)), &hw->reg->ADDR_MASK);
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+ /* wait busy */
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+ pch_gbe_wait_clr_bit(&hw->reg->ADDR_MASK, PCH_GBE_BUSY);
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+}
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+
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+#define MAC_ADDR_LIST_NUM 16
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/**
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* pch_gbe_mac_reset_hw - Reset hardware
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* @hw: Pointer to the HW structure
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*/
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static void pch_gbe_mac_reset_hw(struct pch_gbe_hw *hw)
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{
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+ struct pch_gbe_regs_mac_adr mac_addr_list[MAC_ADDR_LIST_NUM];
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+ int i;
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+
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/* Read the MAC address. and store to the private data */
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pch_gbe_mac_read_mac_addr(hw);
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+ /* Read other MAC addresses */
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+ for (i = 1; i < MAC_ADDR_LIST_NUM; i++)
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+ pch_gbe_mac_save_mac_addr_regs(hw, &mac_addr_list[i], i);
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iowrite32(PCH_GBE_ALL_RST, &hw->reg->RESET);
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#ifdef PCH_GBE_MAC_IFOP_RGMII
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iowrite32(PCH_GBE_MODE_GMII_ETHER, &hw->reg->MODE);
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#endif
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pch_gbe_wait_clr_bit(&hw->reg->RESET, PCH_GBE_ALL_RST);
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- /* Setup the receive address */
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+ /* Setup the receive addresses */
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pch_gbe_mac_mar_set(hw, hw->mac.addr, 0);
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+ for (i = 1; i < MAC_ADDR_LIST_NUM; i++)
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+ pch_gbe_mac_store_mac_addr_regs(hw, &mac_addr_list[i], i);
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return;
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}
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static void pch_gbe_mac_reset_rx(struct pch_gbe_hw *hw)
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{
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- /* Read the MAC address. and store to the private data */
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+ struct pch_gbe_regs_mac_adr mac_addr_list[MAC_ADDR_LIST_NUM];
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+ int i;
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+
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+ /* Read the MAC addresses. and store to the private data */
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pch_gbe_mac_read_mac_addr(hw);
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+ for (i = 1; i < MAC_ADDR_LIST_NUM; i++)
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+ pch_gbe_mac_save_mac_addr_regs(hw, &mac_addr_list[i], i);
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iowrite32(PCH_GBE_RX_RST, &hw->reg->RESET);
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pch_gbe_wait_clr_bit_irq(&hw->reg->RESET, PCH_GBE_RX_RST);
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- /* Setup the MAC address */
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+ /* Setup the MAC addresses */
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pch_gbe_mac_mar_set(hw, hw->mac.addr, 0);
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+ for (i = 1; i < MAC_ADDR_LIST_NUM; i++)
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+ pch_gbe_mac_store_mac_addr_regs(hw, &mac_addr_list[i], i);
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return;
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}
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