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@@ -36,13 +36,15 @@
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#include <linux/delay.h>
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#include <linux/crc32.h>
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#include <linux/dma-mapping.h>
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+#include <linux/debugfs.h>
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+#include <linux/seq_file.h>
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#include <linux/mii.h>
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#include <asm/irq.h>
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#include "skge.h"
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#define DRV_NAME "skge"
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-#define DRV_VERSION "1.11"
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+#define DRV_VERSION "1.12"
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#define PFX DRV_NAME " "
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#define DEFAULT_TX_RING_SIZE 128
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@@ -57,7 +59,10 @@
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#define TX_WATCHDOG (5 * HZ)
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#define NAPI_WEIGHT 64
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#define BLINK_MS 250
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-#define LINK_HZ (HZ/2)
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+#define LINK_HZ HZ
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+
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+#define SKGE_EEPROM_MAGIC 0x9933aabb
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+
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MODULE_DESCRIPTION("SysKonnect Gigabit Ethernet driver");
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MODULE_AUTHOR("Stephen Hemminger <shemminger@linux-foundation.org>");
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@@ -445,15 +450,15 @@ static struct net_device_stats *skge_get_stats(struct net_device *dev)
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else
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yukon_get_stats(skge, data);
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- skge->net_stats.tx_bytes = data[0];
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- skge->net_stats.rx_bytes = data[1];
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- skge->net_stats.tx_packets = data[2] + data[4] + data[6];
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- skge->net_stats.rx_packets = data[3] + data[5] + data[7];
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- skge->net_stats.multicast = data[3] + data[5];
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- skge->net_stats.collisions = data[10];
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- skge->net_stats.tx_aborted_errors = data[12];
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+ dev->stats.tx_bytes = data[0];
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+ dev->stats.rx_bytes = data[1];
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+ dev->stats.tx_packets = data[2] + data[4] + data[6];
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+ dev->stats.rx_packets = data[3] + data[5] + data[7];
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+ dev->stats.multicast = data[3] + data[5];
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+ dev->stats.collisions = data[10];
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+ dev->stats.tx_aborted_errors = data[12];
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- return &skge->net_stats;
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+ return &dev->stats;
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}
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static void skge_get_strings(struct net_device *dev, u32 stringset, u8 *data)
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@@ -798,6 +803,98 @@ static int skge_phys_id(struct net_device *dev, u32 data)
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return 0;
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}
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+static int skge_get_eeprom_len(struct net_device *dev)
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+{
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+ struct skge_port *skge = netdev_priv(dev);
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+ u32 reg2;
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+
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+ pci_read_config_dword(skge->hw->pdev, PCI_DEV_REG2, ®2);
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+ return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
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+}
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+
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+static u32 skge_vpd_read(struct pci_dev *pdev, int cap, u16 offset)
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+{
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+ u32 val;
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+
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+ pci_write_config_word(pdev, cap + PCI_VPD_ADDR, offset);
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+
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+ do {
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+ pci_read_config_word(pdev, cap + PCI_VPD_ADDR, &offset);
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+ } while (!(offset & PCI_VPD_ADDR_F));
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+
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+ pci_read_config_dword(pdev, cap + PCI_VPD_DATA, &val);
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+ return val;
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+}
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+
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+static void skge_vpd_write(struct pci_dev *pdev, int cap, u16 offset, u32 val)
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+{
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+ pci_write_config_dword(pdev, cap + PCI_VPD_DATA, val);
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+ pci_write_config_word(pdev, cap + PCI_VPD_ADDR,
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+ offset | PCI_VPD_ADDR_F);
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+
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+ do {
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+ pci_read_config_word(pdev, cap + PCI_VPD_ADDR, &offset);
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+ } while (offset & PCI_VPD_ADDR_F);
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+}
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+
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+static int skge_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
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+ u8 *data)
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+{
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+ struct skge_port *skge = netdev_priv(dev);
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+ struct pci_dev *pdev = skge->hw->pdev;
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+ int cap = pci_find_capability(pdev, PCI_CAP_ID_VPD);
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+ int length = eeprom->len;
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+ u16 offset = eeprom->offset;
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+
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+ if (!cap)
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+ return -EINVAL;
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+
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+ eeprom->magic = SKGE_EEPROM_MAGIC;
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+
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+ while (length > 0) {
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+ u32 val = skge_vpd_read(pdev, cap, offset);
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+ int n = min_t(int, length, sizeof(val));
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+
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+ memcpy(data, &val, n);
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+ length -= n;
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+ data += n;
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+ offset += n;
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+ }
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+ return 0;
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+}
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+
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+static int skge_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
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+ u8 *data)
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+{
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+ struct skge_port *skge = netdev_priv(dev);
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+ struct pci_dev *pdev = skge->hw->pdev;
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+ int cap = pci_find_capability(pdev, PCI_CAP_ID_VPD);
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+ int length = eeprom->len;
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+ u16 offset = eeprom->offset;
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+
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+ if (!cap)
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+ return -EINVAL;
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+
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+ if (eeprom->magic != SKGE_EEPROM_MAGIC)
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+ return -EINVAL;
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+
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+ while (length > 0) {
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+ u32 val;
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+ int n = min_t(int, length, sizeof(val));
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+
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+ if (n < sizeof(val))
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+ val = skge_vpd_read(pdev, cap, offset);
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+ memcpy(&val, data, n);
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+
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+ skge_vpd_write(pdev, cap, offset, val);
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+
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+ length -= n;
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+ data += n;
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+ offset += n;
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+ }
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+ return 0;
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+}
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+
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static const struct ethtool_ops skge_ethtool_ops = {
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.get_settings = skge_get_settings,
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.set_settings = skge_set_settings,
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@@ -810,6 +907,9 @@ static const struct ethtool_ops skge_ethtool_ops = {
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.set_msglevel = skge_set_msglevel,
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.nway_reset = skge_nway_reset,
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.get_link = ethtool_op_get_link,
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+ .get_eeprom_len = skge_get_eeprom_len,
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+ .get_eeprom = skge_get_eeprom,
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+ .set_eeprom = skge_set_eeprom,
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.get_ringparam = skge_get_ring_param,
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.set_ringparam = skge_set_ring_param,
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.get_pauseparam = skge_get_pauseparam,
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@@ -995,19 +1095,15 @@ static void xm_link_down(struct skge_hw *hw, int port)
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{
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struct net_device *dev = hw->dev[port];
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struct skge_port *skge = netdev_priv(dev);
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- u16 cmd, msk;
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+ u16 cmd = xm_read16(hw, port, XM_MMU_CMD);
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- if (hw->phy_type == SK_PHY_XMAC) {
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- msk = xm_read16(hw, port, XM_IMSK);
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- msk |= XM_IS_INP_ASS | XM_IS_LIPA_RC | XM_IS_RX_PAGE | XM_IS_AND;
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- xm_write16(hw, port, XM_IMSK, msk);
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- }
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+ xm_write16(hw, port, XM_IMSK, XM_IMSK_DISABLE);
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- cmd = xm_read16(hw, port, XM_MMU_CMD);
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cmd &= ~(XM_MMU_ENA_RX | XM_MMU_ENA_TX);
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xm_write16(hw, port, XM_MMU_CMD, cmd);
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+
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/* dummy read to ensure writing */
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- (void) xm_read16(hw, port, XM_MMU_CMD);
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+ xm_read16(hw, port, XM_MMU_CMD);
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if (netif_carrier_ok(dev))
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skge_link_down(skge);
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@@ -1103,7 +1199,7 @@ static void genesis_reset(struct skge_hw *hw, int port)
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/* reset the statistics module */
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xm_write32(hw, port, XM_GP_PORT, XM_GP_RES_STAT);
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- xm_write16(hw, port, XM_IMSK, 0xffff); /* disable XMAC IRQs */
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+ xm_write16(hw, port, XM_IMSK, XM_IMSK_DISABLE);
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xm_write32(hw, port, XM_MODE, 0); /* clear Mode Reg */
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xm_write16(hw, port, XM_TX_CMD, 0); /* reset TX CMD Reg */
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xm_write16(hw, port, XM_RX_CMD, 0); /* reset RX CMD Reg */
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@@ -1141,7 +1237,7 @@ static void bcom_check_link(struct skge_hw *hw, int port)
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u16 status;
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/* read twice because of latch */
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- (void) xm_phy_read(hw, port, PHY_BCOM_STAT);
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+ xm_phy_read(hw, port, PHY_BCOM_STAT);
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status = xm_phy_read(hw, port, PHY_BCOM_STAT);
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if ((status & PHY_ST_LSYNC) == 0) {
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@@ -1342,7 +1438,7 @@ static void xm_phy_init(struct skge_port *skge)
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mod_timer(&skge->link_timer, jiffies + LINK_HZ);
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}
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-static void xm_check_link(struct net_device *dev)
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+static int xm_check_link(struct net_device *dev)
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{
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struct skge_port *skge = netdev_priv(dev);
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struct skge_hw *hw = skge->hw;
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@@ -1350,25 +1446,25 @@ static void xm_check_link(struct net_device *dev)
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u16 status;
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/* read twice because of latch */
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- (void) xm_phy_read(hw, port, PHY_XMAC_STAT);
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+ xm_phy_read(hw, port, PHY_XMAC_STAT);
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status = xm_phy_read(hw, port, PHY_XMAC_STAT);
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if ((status & PHY_ST_LSYNC) == 0) {
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xm_link_down(hw, port);
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- return;
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+ return 0;
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}
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if (skge->autoneg == AUTONEG_ENABLE) {
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u16 lpa, res;
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if (!(status & PHY_ST_AN_OVER))
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- return;
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+ return 0;
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lpa = xm_phy_read(hw, port, PHY_XMAC_AUNE_LP);
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if (lpa & PHY_B_AN_RF) {
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printk(KERN_NOTICE PFX "%s: remote fault\n",
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dev->name);
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- return;
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+ return 0;
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}
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res = xm_phy_read(hw, port, PHY_XMAC_RES_ABI);
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@@ -1384,7 +1480,7 @@ static void xm_check_link(struct net_device *dev)
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default:
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printk(KERN_NOTICE PFX "%s: duplex mismatch\n",
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dev->name);
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- return;
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+ return 0;
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}
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/* We are using IEEE 802.3z/D5.0 Table 37-4 */
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@@ -1408,11 +1504,14 @@ static void xm_check_link(struct net_device *dev)
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if (!netif_carrier_ok(dev))
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genesis_link_up(skge);
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+ return 1;
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}
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/* Poll to check for link coming up.
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+ *
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* Since internal PHY is wired to a level triggered pin, can't
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- * get an interrupt when carrier is detected.
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+ * get an interrupt when carrier is detected, need to poll for
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+ * link coming up.
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*/
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static void xm_link_timer(unsigned long arg)
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{
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@@ -1420,29 +1519,35 @@ static void xm_link_timer(unsigned long arg)
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struct net_device *dev = skge->netdev;
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struct skge_hw *hw = skge->hw;
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int port = skge->port;
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+ int i;
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+ unsigned long flags;
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if (!netif_running(dev))
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return;
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- if (netif_carrier_ok(dev)) {
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+ spin_lock_irqsave(&hw->phy_lock, flags);
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+
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+ /*
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+ * Verify that the link by checking GPIO register three times.
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+ * This pin has the signal from the link_sync pin connected to it.
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+ */
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+ for (i = 0; i < 3; i++) {
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+ if (xm_read16(hw, port, XM_GP_PORT) & XM_GP_INP_ASS)
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+ goto link_down;
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+ }
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+
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+ /* Re-enable interrupt to detect link down */
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+ if (xm_check_link(dev)) {
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+ u16 msk = xm_read16(hw, port, XM_IMSK);
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+ msk &= ~XM_IS_INP_ASS;
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+ xm_write16(hw, port, XM_IMSK, msk);
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xm_read16(hw, port, XM_ISRC);
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- if (!(xm_read16(hw, port, XM_ISRC) & XM_IS_INP_ASS))
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- goto nochange;
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} else {
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- if (xm_read32(hw, port, XM_GP_PORT) & XM_GP_INP_ASS)
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- goto nochange;
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- xm_read16(hw, port, XM_ISRC);
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- if (xm_read16(hw, port, XM_ISRC) & XM_IS_INP_ASS)
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- goto nochange;
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+link_down:
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+ mod_timer(&skge->link_timer,
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+ round_jiffies(jiffies + LINK_HZ));
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}
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-
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- spin_lock(&hw->phy_lock);
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- xm_check_link(dev);
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- spin_unlock(&hw->phy_lock);
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-
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-nochange:
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- if (netif_running(dev))
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- mod_timer(&skge->link_timer, jiffies + LINK_HZ);
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+ spin_unlock_irqrestore(&hw->phy_lock, flags);
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}
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static void genesis_mac_init(struct skge_hw *hw, int port)
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@@ -1679,24 +1784,27 @@ static void genesis_get_stats(struct skge_port *skge, u64 *data)
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static void genesis_mac_intr(struct skge_hw *hw, int port)
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{
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- struct skge_port *skge = netdev_priv(hw->dev[port]);
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+ struct net_device *dev = hw->dev[port];
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+ struct skge_port *skge = netdev_priv(dev);
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u16 status = xm_read16(hw, port, XM_ISRC);
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if (netif_msg_intr(skge))
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printk(KERN_DEBUG PFX "%s: mac interrupt status 0x%x\n",
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- skge->netdev->name, status);
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+ dev->name, status);
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- if (hw->phy_type == SK_PHY_XMAC &&
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- (status & (XM_IS_INP_ASS | XM_IS_LIPA_RC)))
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- xm_link_down(hw, port);
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+ if (hw->phy_type == SK_PHY_XMAC && (status & XM_IS_INP_ASS)) {
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+ xm_link_down(hw, port);
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+ mod_timer(&skge->link_timer, jiffies + 1);
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+ }
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if (status & XM_IS_TXF_UR) {
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xm_write32(hw, port, XM_MODE, XM_MD_FTF);
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- ++skge->net_stats.tx_fifo_errors;
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+ ++dev->stats.tx_fifo_errors;
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}
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+
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if (status & XM_IS_RXF_OV) {
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xm_write32(hw, port, XM_MODE, XM_MD_FRF);
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- ++skge->net_stats.rx_fifo_errors;
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+ ++dev->stats.rx_fifo_errors;
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}
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}
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@@ -1753,11 +1861,12 @@ static void genesis_link_up(struct skge_port *skge)
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}
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xm_write32(hw, port, XM_MODE, mode);
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- msk = XM_DEF_MSK;
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- if (hw->phy_type != SK_PHY_XMAC)
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- msk |= XM_IS_INP_ASS; /* disable GP0 interrupt bit */
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+ /* Turn on detection of Tx underrun, Rx overrun */
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+ msk = xm_read16(hw, port, XM_IMSK);
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+ msk &= ~(XM_IS_RXF_OV | XM_IS_TXF_UR);
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xm_write16(hw, port, XM_IMSK, msk);
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+
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xm_read16(hw, port, XM_ISRC);
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/* get MMU Command Reg. */
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@@ -2192,12 +2301,12 @@ static void yukon_mac_intr(struct skge_hw *hw, int port)
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dev->name, status);
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if (status & GM_IS_RX_FF_OR) {
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- ++skge->net_stats.rx_fifo_errors;
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+ ++dev->stats.rx_fifo_errors;
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skge_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO);
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}
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if (status & GM_IS_TX_FF_UR) {
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- ++skge->net_stats.tx_fifo_errors;
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+ ++dev->stats.tx_fifo_errors;
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skge_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU);
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}
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@@ -2403,32 +2512,31 @@ static int skge_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
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return err;
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}
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-static void skge_ramset(struct skge_hw *hw, u16 q, u32 start, size_t len)
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+/* Assign Ram Buffer allocation to queue */
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+static void skge_ramset(struct skge_hw *hw, u16 q, u32 start, u32 space)
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{
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u32 end;
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- start /= 8;
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- len /= 8;
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- end = start + len - 1;
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+ /* convert from K bytes to qwords used for hw register */
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+ start *= 1024/8;
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+ space *= 1024/8;
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+ end = start + space - 1;
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skge_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
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skge_write32(hw, RB_ADDR(q, RB_START), start);
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+ skge_write32(hw, RB_ADDR(q, RB_END), end);
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skge_write32(hw, RB_ADDR(q, RB_WP), start);
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skge_write32(hw, RB_ADDR(q, RB_RP), start);
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- skge_write32(hw, RB_ADDR(q, RB_END), end);
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if (q == Q_R1 || q == Q_R2) {
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+ u32 tp = space - space/4;
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+
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/* Set thresholds on receive queue's */
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- skge_write32(hw, RB_ADDR(q, RB_RX_UTPP),
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- start + (2*len)/3);
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- skge_write32(hw, RB_ADDR(q, RB_RX_LTPP),
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- start + (len/3));
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- } else {
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- /* Enable store & forward on Tx queue's because
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- * Tx FIFO is only 4K on Genesis and 1K on Yukon
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- */
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+ skge_write32(hw, RB_ADDR(q, RB_RX_UTPP), tp);
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+ skge_write32(hw, RB_ADDR(q, RB_RX_LTPP), space/4);
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+ } else if (hw->chip_id != CHIP_ID_GENESIS)
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+ /* Genesis Tx Fifo is too small for normal store/forward */
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skge_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD);
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- }
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skge_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD);
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}
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@@ -2456,7 +2564,7 @@ static int skge_up(struct net_device *dev)
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struct skge_port *skge = netdev_priv(dev);
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struct skge_hw *hw = skge->hw;
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int port = skge->port;
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- u32 chunk, ram_addr;
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+ u32 ramaddr, ramsize, rxspace;
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size_t rx_size, tx_size;
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int err;
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@@ -2511,14 +2619,15 @@ static int skge_up(struct net_device *dev)
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spin_unlock_bh(&hw->phy_lock);
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/* Configure RAMbuffers */
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- chunk = hw->ram_size / ((hw->ports + 1)*2);
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- ram_addr = hw->ram_offset + 2 * chunk * port;
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+ ramsize = (hw->ram_size - hw->ram_offset) / hw->ports;
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+ ramaddr = hw->ram_offset + port * ramsize;
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+ rxspace = 8 + (2*(ramsize - 16))/3;
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- skge_ramset(hw, rxqaddr[port], ram_addr, chunk);
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- skge_qset(skge, rxqaddr[port], skge->rx_ring.to_clean);
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+ skge_ramset(hw, rxqaddr[port], ramaddr, rxspace);
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+ skge_ramset(hw, txqaddr[port], ramaddr + rxspace, ramsize - rxspace);
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+ skge_qset(skge, rxqaddr[port], skge->rx_ring.to_clean);
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BUG_ON(skge->tx_ring.to_use != skge->tx_ring.to_clean);
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- skge_ramset(hw, txqaddr[port], ram_addr+chunk, chunk);
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skge_qset(skge, txqaddr[port], skge->tx_ring.to_use);
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/* Start receiver BMU */
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@@ -2544,6 +2653,15 @@ static int skge_up(struct net_device *dev)
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return err;
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}
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+/* stop receiver */
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+static void skge_rx_stop(struct skge_hw *hw, int port)
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+{
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+ skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_STOP);
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+ skge_write32(hw, RB_ADDR(port ? Q_R2 : Q_R1, RB_CTRL),
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+ RB_RST_SET|RB_DIS_OP_MD);
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+ skge_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_SET_RESET);
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+}
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+
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static int skge_down(struct net_device *dev)
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{
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struct skge_port *skge = netdev_priv(dev);
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@@ -2595,11 +2713,8 @@ static int skge_down(struct net_device *dev)
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/* Reset the RAM Buffer async Tx queue */
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skge_write8(hw, RB_ADDR(port == 0 ? Q_XA1 : Q_XA2, RB_CTRL), RB_RST_SET);
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- /* stop receiver */
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- skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_STOP);
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- skge_write32(hw, RB_ADDR(port ? Q_R2 : Q_R1, RB_CTRL),
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- RB_RST_SET|RB_DIS_OP_MD);
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- skge_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_SET_RESET);
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+
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+ skge_rx_stop(hw, port);
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if (hw->chip_id == CHIP_ID_GENESIS) {
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skge_write8(hw, SK_REG(port, TX_MFF_CTRL2), MFF_RST_SET);
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@@ -2782,7 +2897,11 @@ static void skge_tx_timeout(struct net_device *dev)
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static int skge_change_mtu(struct net_device *dev, int new_mtu)
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{
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+ struct skge_port *skge = netdev_priv(dev);
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+ struct skge_hw *hw = skge->hw;
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+ int port = skge->port;
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int err;
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+ u16 ctl, reg;
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if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU)
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return -EINVAL;
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@@ -2792,13 +2911,40 @@ static int skge_change_mtu(struct net_device *dev, int new_mtu)
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return 0;
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}
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- skge_down(dev);
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+ skge_write32(hw, B0_IMSK, 0);
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+ dev->trans_start = jiffies; /* prevent tx timeout */
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+ netif_stop_queue(dev);
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+ napi_disable(&skge->napi);
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+
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+ ctl = gma_read16(hw, port, GM_GP_CTRL);
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+ gma_write16(hw, port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA);
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+
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+ skge_rx_clean(skge);
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+ skge_rx_stop(hw, port);
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dev->mtu = new_mtu;
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- err = skge_up(dev);
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+ reg = GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
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+ if (new_mtu > 1500)
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+ reg |= GM_SMOD_JUMBO_ENA;
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+ gma_write16(hw, port, GM_SERIAL_MODE, reg);
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+
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+ skge_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD);
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+
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+ err = skge_rx_fill(dev);
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+ wmb();
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+ if (!err)
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+ skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_START | CSR_IRQ_CL_F);
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+ skge_write32(hw, B0_IMSK, hw->intr_mask);
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+
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if (err)
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dev_close(dev);
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+ else {
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+ gma_write16(hw, port, GM_GP_CTRL, ctl);
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+
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+ napi_enable(&skge->napi);
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+ netif_wake_queue(dev);
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+ }
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return err;
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}
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@@ -2994,18 +3140,18 @@ error:
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if (skge->hw->chip_id == CHIP_ID_GENESIS) {
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if (status & (XMR_FS_RUNT|XMR_FS_LNG_ERR))
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- skge->net_stats.rx_length_errors++;
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+ dev->stats.rx_length_errors++;
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if (status & XMR_FS_FRA_ERR)
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- skge->net_stats.rx_frame_errors++;
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+ dev->stats.rx_frame_errors++;
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if (status & XMR_FS_FCS_ERR)
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- skge->net_stats.rx_crc_errors++;
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+ dev->stats.rx_crc_errors++;
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} else {
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if (status & (GMR_FS_LONG_ERR|GMR_FS_UN_SIZE))
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- skge->net_stats.rx_length_errors++;
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+ dev->stats.rx_length_errors++;
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if (status & GMR_FS_FRAGMENT)
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- skge->net_stats.rx_frame_errors++;
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+ dev->stats.rx_frame_errors++;
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if (status & GMR_FS_CRC_ERR)
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- skge->net_stats.rx_crc_errors++;
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+ dev->stats.rx_crc_errors++;
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}
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resubmit:
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@@ -3103,10 +3249,7 @@ static void skge_mac_parity(struct skge_hw *hw, int port)
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{
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struct net_device *dev = hw->dev[port];
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- if (dev) {
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- struct skge_port *skge = netdev_priv(dev);
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- ++skge->net_stats.tx_heartbeat_errors;
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- }
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+ ++dev->stats.tx_heartbeat_errors;
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if (hw->chip_id == CHIP_ID_GENESIS)
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skge_write16(hw, SK_REG(port, TX_MFF_CTRL1),
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@@ -3259,9 +3402,7 @@ static irqreturn_t skge_intr(int irq, void *dev_id)
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skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_TX1);
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if (status & IS_PA_TO_RX1) {
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- struct skge_port *skge = netdev_priv(hw->dev[0]);
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-
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- ++skge->net_stats.rx_over_errors;
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+ ++hw->dev[0]->stats.rx_over_errors;
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skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_RX1);
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}
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@@ -3278,7 +3419,7 @@ static irqreturn_t skge_intr(int irq, void *dev_id)
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}
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if (status & IS_PA_TO_RX2) {
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- ++skge->net_stats.rx_over_errors;
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+ ++hw->dev[1]->stats.rx_over_errors;
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skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_RX2);
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}
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@@ -3450,15 +3591,12 @@ static int skge_reset(struct skge_hw *hw)
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if (hw->chip_id == CHIP_ID_GENESIS) {
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if (t8 == 3) {
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/* special case: 4 x 64k x 36, offset = 0x80000 */
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- hw->ram_size = 0x100000;
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- hw->ram_offset = 0x80000;
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+ hw->ram_size = 1024;
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+ hw->ram_offset = 512;
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} else
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hw->ram_size = t8 * 512;
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- }
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- else if (t8 == 0)
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- hw->ram_size = 0x20000;
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- else
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- hw->ram_size = t8 * 4096;
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+ } else /* Yukon */
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+ hw->ram_size = t8 ? t8 * 4 : 128;
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hw->intr_mask = IS_HW_ERR;
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@@ -3540,6 +3678,145 @@ static int skge_reset(struct skge_hw *hw)
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return 0;
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}
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+
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+#ifdef CONFIG_SKGE_DEBUG
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+
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+static struct dentry *skge_debug;
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+
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+static int skge_debug_show(struct seq_file *seq, void *v)
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+{
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+ struct net_device *dev = seq->private;
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+ const struct skge_port *skge = netdev_priv(dev);
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+ const struct skge_hw *hw = skge->hw;
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+ const struct skge_element *e;
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+
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+ if (!netif_running(dev))
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+ return -ENETDOWN;
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+
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+ seq_printf(seq, "IRQ src=%x mask=%x\n", skge_read32(hw, B0_ISRC),
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+ skge_read32(hw, B0_IMSK));
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+
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+ seq_printf(seq, "Tx Ring: (%d)\n", skge_avail(&skge->tx_ring));
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+ for (e = skge->tx_ring.to_clean; e != skge->tx_ring.to_use; e = e->next) {
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+ const struct skge_tx_desc *t = e->desc;
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+ seq_printf(seq, "%#x dma=%#x%08x %#x csum=%#x/%x/%x\n",
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+ t->control, t->dma_hi, t->dma_lo, t->status,
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+ t->csum_offs, t->csum_write, t->csum_start);
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+ }
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+
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+ seq_printf(seq, "\nRx Ring: \n");
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+ for (e = skge->rx_ring.to_clean; ; e = e->next) {
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+ const struct skge_rx_desc *r = e->desc;
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+
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+ if (r->control & BMU_OWN)
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+ break;
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+
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|
|
+ seq_printf(seq, "%#x dma=%#x%08x %#x %#x csum=%#x/%x\n",
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|
|
+ r->control, r->dma_hi, r->dma_lo, r->status,
|
|
|
+ r->timestamp, r->csum1, r->csum1_start);
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|
+ }
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+
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+ return 0;
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+}
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|
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+
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|
|
+static int skge_debug_open(struct inode *inode, struct file *file)
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+{
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+ return single_open(file, skge_debug_show, inode->i_private);
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|
+}
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|
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+
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|
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+static const struct file_operations skge_debug_fops = {
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+ .owner = THIS_MODULE,
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+ .open = skge_debug_open,
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+ .read = seq_read,
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+ .llseek = seq_lseek,
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+ .release = single_release,
|
|
|
+};
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|
|
+
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|
|
+/*
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|
|
+ * Use network device events to create/remove/rename
|
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+ * debugfs file entries
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|
|
+ */
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|
|
+static int skge_device_event(struct notifier_block *unused,
|
|
|
+ unsigned long event, void *ptr)
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|
|
+{
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|
|
+ struct net_device *dev = ptr;
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|
|
+ struct skge_port *skge;
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|
|
+ struct dentry *d;
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|
+
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|
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+ if (dev->open != &skge_up || !skge_debug)
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|
|
+ goto done;
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|
+
|
|
|
+ skge = netdev_priv(dev);
|
|
|
+ switch(event) {
|
|
|
+ case NETDEV_CHANGENAME:
|
|
|
+ if (skge->debugfs) {
|
|
|
+ d = debugfs_rename(skge_debug, skge->debugfs,
|
|
|
+ skge_debug, dev->name);
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|
|
+ if (d)
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|
|
+ skge->debugfs = d;
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|
|
+ else {
|
|
|
+ pr_info(PFX "%s: rename failed\n", dev->name);
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|
|
+ debugfs_remove(skge->debugfs);
|
|
|
+ }
|
|
|
+ }
|
|
|
+ break;
|
|
|
+
|
|
|
+ case NETDEV_GOING_DOWN:
|
|
|
+ if (skge->debugfs) {
|
|
|
+ debugfs_remove(skge->debugfs);
|
|
|
+ skge->debugfs = NULL;
|
|
|
+ }
|
|
|
+ break;
|
|
|
+
|
|
|
+ case NETDEV_UP:
|
|
|
+ d = debugfs_create_file(dev->name, S_IRUGO,
|
|
|
+ skge_debug, dev,
|
|
|
+ &skge_debug_fops);
|
|
|
+ if (!d || IS_ERR(d))
|
|
|
+ pr_info(PFX "%s: debugfs create failed\n",
|
|
|
+ dev->name);
|
|
|
+ else
|
|
|
+ skge->debugfs = d;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+
|
|
|
+done:
|
|
|
+ return NOTIFY_DONE;
|
|
|
+}
|
|
|
+
|
|
|
+static struct notifier_block skge_notifier = {
|
|
|
+ .notifier_call = skge_device_event,
|
|
|
+};
|
|
|
+
|
|
|
+
|
|
|
+static __init void skge_debug_init(void)
|
|
|
+{
|
|
|
+ struct dentry *ent;
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|
|
+
|
|
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+ ent = debugfs_create_dir("skge", NULL);
|
|
|
+ if (!ent || IS_ERR(ent)) {
|
|
|
+ pr_info(PFX "debugfs create directory failed\n");
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|
|
+ return;
|
|
|
+ }
|
|
|
+
|
|
|
+ skge_debug = ent;
|
|
|
+ register_netdevice_notifier(&skge_notifier);
|
|
|
+}
|
|
|
+
|
|
|
+static __exit void skge_debug_cleanup(void)
|
|
|
+{
|
|
|
+ if (skge_debug) {
|
|
|
+ unregister_netdevice_notifier(&skge_notifier);
|
|
|
+ debugfs_remove(skge_debug);
|
|
|
+ skge_debug = NULL;
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+#else
|
|
|
+#define skge_debug_init()
|
|
|
+#define skge_debug_cleanup()
|
|
|
+#endif
|
|
|
+
|
|
|
/* Initialize network device */
|
|
|
static struct net_device *skge_devinit(struct skge_hw *hw, int port,
|
|
|
int highmem)
|
|
|
@@ -3904,12 +4181,14 @@ static struct pci_driver skge_driver = {
|
|
|
|
|
|
static int __init skge_init_module(void)
|
|
|
{
|
|
|
+ skge_debug_init();
|
|
|
return pci_register_driver(&skge_driver);
|
|
|
}
|
|
|
|
|
|
static void __exit skge_cleanup_module(void)
|
|
|
{
|
|
|
pci_unregister_driver(&skge_driver);
|
|
|
+ skge_debug_cleanup();
|
|
|
}
|
|
|
|
|
|
module_init(skge_init_module);
|
Linus Torvalds