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@@ -21,13 +21,56 @@
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#include <linux/irqchip.h>
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#include <linux/kernel.h>
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#include <linux/of_platform.h>
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+#include <linux/serial_sci.h>
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#include <mach/common.h>
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#include <mach/irqs.h>
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#include <mach/r8a73a4.h>
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#include <asm/mach/arch.h>
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+#define SCIF_COMMON(scif_type, baseaddr, irq) \
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+ .type = scif_type, \
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+ .mapbase = baseaddr, \
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+ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
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+ .scbrr_algo_id = SCBRR_ALGO_4, \
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+ .irqs = SCIx_IRQ_MUXED(irq)
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+
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+#define SCIFA_DATA(index, baseaddr, irq) \
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+[index] = { \
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+ SCIF_COMMON(PORT_SCIFA, baseaddr, irq), \
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+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \
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+}
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+
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+#define SCIFB_DATA(index, baseaddr, irq) \
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+[index] = { \
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+ SCIF_COMMON(PORT_SCIFB, baseaddr, irq), \
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+ .scscr = SCSCR_RE | SCSCR_TE, \
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+}
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+
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+enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFB3 };
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+
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+static const struct plat_sci_port scif[] = {
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+ SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
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+ SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
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+ SCIFB_DATA(SCIFB0, 0xe6c50000, gic_spi(145)), /* SCIFB0 */
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+ SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
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+ SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
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+ SCIFB_DATA(SCIFB3, 0xe6cf0000, gic_spi(151)), /* SCIFB3 */
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+};
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+
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+static inline void r8a73a4_register_scif(int idx)
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+{
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+ platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
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+ sizeof(struct plat_sci_port));
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+}
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+
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void __init r8a73a4_add_standard_devices(void)
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{
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+ r8a73a4_register_scif(SCIFA0);
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+ r8a73a4_register_scif(SCIFA1);
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+ r8a73a4_register_scif(SCIFB0);
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+ r8a73a4_register_scif(SCIFB1);
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+ r8a73a4_register_scif(SCIFB2);
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+ r8a73a4_register_scif(SCIFB3);
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}
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#ifdef CONFIG_USE_OF
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