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@@ -321,20 +321,6 @@
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#define IS_SIM(chippkg) \
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((chippkg == HDLSIM_PKG_ID) || (chippkg == HWSIM_PKG_ID))
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-/*
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- * Macros to disable/restore function core(D11, ENET, ILINE20, etc) interrupts
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- * before after core switching to avoid invalid register accesss inside ISR.
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- */
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-#define INTR_OFF(si, intr_val) \
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- if ((si)->intrsoff_fn && \
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- (si)->coreid[(si)->curidx] == (si)->dev_coreid) \
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- intr_val = (*(si)->intrsoff_fn)((si)->intr_arg)
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-
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-#define INTR_RESTORE(si, intr_val) \
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- if ((si)->intrsrestore_fn && \
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- (si)->coreid[(si)->curidx] == (si)->dev_coreid) \
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- (*(si)->intrsrestore_fn)((si)->intr_arg, intr_val)
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-
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#define PCI(sih) (ai_get_buscoretype(sih) == PCI_CORE_ID)
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#define PCIE(sih) (ai_get_buscoretype(sih) == PCIE_CORE_ID)
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@@ -872,32 +858,6 @@ void __iomem *ai_setcore(struct si_pub *sih, uint coreid, uint coreunit)
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return ai_setcoreidx(sih, core->core_index);
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}
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-/* Turn off interrupt as required by ai_setcore, before switch core */
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-void __iomem *ai_switch_core(struct si_pub *sih, uint coreid, uint *origidx,
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- uint *intr_val)
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-{
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- void __iomem *cc;
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- struct si_info *sii;
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-
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- sii = (struct si_info *)sih;
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-
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- INTR_OFF(sii, *intr_val);
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- *origidx = sii->curidx;
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- cc = ai_setcore(sih, coreid, 0);
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- return cc;
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-}
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-
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-/* restore coreidx and restore interrupt */
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-void ai_restore_core(struct si_pub *sih, uint coreid, uint intr_val)
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-{
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- struct si_info *sii;
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-
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- sii = (struct si_info *)sih;
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-
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- ai_setcoreidx(sih, coreid);
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- INTR_RESTORE(sii, intr_val);
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-}
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-
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/*
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* Switch to 'coreidx', issue a single arbitrary 32bit register mask&set
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* operation, switch back to the original core, and return the new value.
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