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@@ -714,12 +714,75 @@ static int iwl_trans_pcie_prepare_card_hw(struct iwl_trans *trans)
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return ret;
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}
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+#define IWL_AC_UNSET -1
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+
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+struct queue_to_fifo_ac {
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+ s8 fifo, ac;
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+};
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+
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+static const struct queue_to_fifo_ac iwlagn_default_queue_to_tx_fifo[] = {
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+ { IWL_TX_FIFO_VO, IEEE80211_AC_VO, },
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+ { IWL_TX_FIFO_VI, IEEE80211_AC_VI, },
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+ { IWL_TX_FIFO_BE, IEEE80211_AC_BE, },
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+ { IWL_TX_FIFO_BK, IEEE80211_AC_BK, },
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+ { IWLAGN_CMD_FIFO_NUM, IWL_AC_UNSET, },
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+ { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
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+ { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
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+ { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
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+ { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
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+ { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
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+ { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
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+};
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+
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+static const struct queue_to_fifo_ac iwlagn_ipan_queue_to_tx_fifo[] = {
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+ { IWL_TX_FIFO_VO, IEEE80211_AC_VO, },
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+ { IWL_TX_FIFO_VI, IEEE80211_AC_VI, },
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+ { IWL_TX_FIFO_BE, IEEE80211_AC_BE, },
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+ { IWL_TX_FIFO_BK, IEEE80211_AC_BK, },
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+ { IWL_TX_FIFO_BK_IPAN, IEEE80211_AC_BK, },
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+ { IWL_TX_FIFO_BE_IPAN, IEEE80211_AC_BE, },
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+ { IWL_TX_FIFO_VI_IPAN, IEEE80211_AC_VI, },
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+ { IWL_TX_FIFO_VO_IPAN, IEEE80211_AC_VO, },
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+ { IWL_TX_FIFO_BE_IPAN, 2, },
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+ { IWLAGN_CMD_FIFO_NUM, IWL_AC_UNSET, },
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+ { IWL_TX_FIFO_AUX, IWL_AC_UNSET, },
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+};
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+
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+static const u8 iwlagn_bss_ac_to_fifo[] = {
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+ IWL_TX_FIFO_VO,
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+ IWL_TX_FIFO_VI,
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+ IWL_TX_FIFO_BE,
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+ IWL_TX_FIFO_BK,
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+};
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+static const u8 iwlagn_bss_ac_to_queue[] = {
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+ 0, 1, 2, 3,
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+};
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+static const u8 iwlagn_pan_ac_to_fifo[] = {
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+ IWL_TX_FIFO_VO_IPAN,
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+ IWL_TX_FIFO_VI_IPAN,
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+ IWL_TX_FIFO_BE_IPAN,
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+ IWL_TX_FIFO_BK_IPAN,
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+};
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+static const u8 iwlagn_pan_ac_to_queue[] = {
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+ 7, 6, 5, 4,
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+};
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+
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static int iwl_trans_pcie_start_device(struct iwl_trans *trans)
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{
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int ret;
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struct iwl_priv *priv = priv(trans);
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+ struct iwl_trans_pcie *trans_pcie =
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+ IWL_TRANS_GET_PCIE_TRANS(trans);
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priv->shrd->ucode_owner = IWL_OWNERSHIP_DRIVER;
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+ trans_pcie->ac_to_queue[IWL_RXON_CTX_BSS] = iwlagn_bss_ac_to_queue;
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+ trans_pcie->ac_to_queue[IWL_RXON_CTX_PAN] = iwlagn_pan_ac_to_queue;
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+
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+ trans_pcie->ac_to_fifo[IWL_RXON_CTX_BSS] = iwlagn_bss_ac_to_fifo;
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+ trans_pcie->ac_to_fifo[IWL_RXON_CTX_PAN] = iwlagn_pan_ac_to_fifo;
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+
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+ trans_pcie->mcast_queue[IWL_RXON_CTX_BSS] = 0;
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+ trans_pcie->mcast_queue[IWL_RXON_CTX_PAN] = IWL_IPAN_MCAST_QUEUE;
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if ((hw_params(priv).sku & EEPROM_SKU_CAP_AMT_ENABLE) &&
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iwl_trans_pcie_prepare_card_hw(trans)) {
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@@ -773,39 +836,6 @@ static void iwl_trans_txq_set_sched(struct iwl_trans *trans, u32 mask)
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iwl_write_prph(bus(trans), SCD_TXFACT, mask);
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}
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-#define IWL_AC_UNSET -1
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-
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-struct queue_to_fifo_ac {
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- s8 fifo, ac;
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-};
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-
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-static const struct queue_to_fifo_ac iwlagn_default_queue_to_tx_fifo[] = {
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- { IWL_TX_FIFO_VO, IEEE80211_AC_VO, },
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- { IWL_TX_FIFO_VI, IEEE80211_AC_VI, },
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- { IWL_TX_FIFO_BE, IEEE80211_AC_BE, },
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- { IWL_TX_FIFO_BK, IEEE80211_AC_BK, },
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- { IWLAGN_CMD_FIFO_NUM, IWL_AC_UNSET, },
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- { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
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- { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
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- { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
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- { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
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- { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
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- { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
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-};
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-
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-static const struct queue_to_fifo_ac iwlagn_ipan_queue_to_tx_fifo[] = {
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- { IWL_TX_FIFO_VO, IEEE80211_AC_VO, },
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- { IWL_TX_FIFO_VI, IEEE80211_AC_VI, },
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- { IWL_TX_FIFO_BE, IEEE80211_AC_BE, },
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- { IWL_TX_FIFO_BK, IEEE80211_AC_BK, },
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- { IWL_TX_FIFO_BK_IPAN, IEEE80211_AC_BK, },
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- { IWL_TX_FIFO_BE_IPAN, IEEE80211_AC_BE, },
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- { IWL_TX_FIFO_VI_IPAN, IEEE80211_AC_VI, },
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- { IWL_TX_FIFO_VO_IPAN, IEEE80211_AC_VO, },
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- { IWL_TX_FIFO_BE_IPAN, 2, },
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- { IWLAGN_CMD_FIFO_NUM, IWL_AC_UNSET, },
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- { IWL_TX_FIFO_AUX, IWL_AC_UNSET, },
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-};
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static void iwl_trans_pcie_tx_start(struct iwl_trans *trans)
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{
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const struct queue_to_fifo_ac *queue_to_fifo;
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@@ -1012,22 +1042,75 @@ static void iwl_trans_pcie_stop_device(struct iwl_trans *trans)
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iwl_apm_stop(priv(trans));
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}
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-static int iwl_trans_pcie_tx(struct iwl_priv *priv, struct sk_buff *skb,
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- struct iwl_device_cmd *dev_cmd, int txq_id,
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- __le16 fc, bool ampdu)
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+static int iwl_trans_pcie_tx(struct iwl_trans *trans, struct sk_buff *skb,
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+ struct iwl_device_cmd *dev_cmd, u8 ctx, u8 sta_id)
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{
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- struct iwl_tx_queue *txq = &priv->txq[txq_id];
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- struct iwl_queue *q = &txq->q;
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+ struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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+ struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
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+ struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
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struct iwl_tx_cmd *tx_cmd = &dev_cmd->cmd.tx;
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struct iwl_cmd_meta *out_meta;
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+ struct iwl_tx_queue *txq;
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+ struct iwl_queue *q;
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dma_addr_t phys_addr = 0;
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dma_addr_t txcmd_phys;
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dma_addr_t scratch_phys;
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u16 len, firstlen, secondlen;
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+ u16 seq_number = 0;
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u8 wait_write_ptr = 0;
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+ u8 txq_id;
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+ u8 tid = 0;
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+ bool is_agg = false;
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+ __le16 fc = hdr->frame_control;
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u8 hdr_len = ieee80211_hdrlen(fc);
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+ /*
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+ * Send this frame after DTIM -- there's a special queue
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+ * reserved for this for contexts that support AP mode.
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+ */
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+ if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
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+ txq_id = trans_pcie->mcast_queue[ctx];
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+
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+ /*
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+ * The microcode will clear the more data
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+ * bit in the last frame it transmits.
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+ */
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+ hdr->frame_control |=
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+ cpu_to_le16(IEEE80211_FCTL_MOREDATA);
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+ } else if (info->flags & IEEE80211_TX_CTL_TX_OFFCHAN)
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+ txq_id = IWL_AUX_QUEUE;
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+ else
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+ txq_id =
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+ trans_pcie->ac_to_queue[ctx][skb_get_queue_mapping(skb)];
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+
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+ if (ieee80211_is_data_qos(fc)) {
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+ u8 *qc = NULL;
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+ struct iwl_tid_data *tid_data;
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+ qc = ieee80211_get_qos_ctl(hdr);
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+ tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
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+ tid_data = &trans->shrd->tid_data[sta_id][tid];
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+
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+ if (WARN_ON_ONCE(tid >= IWL_MAX_TID_COUNT))
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+ return -1;
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+
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+ seq_number = tid_data->seq_number;
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+ seq_number &= IEEE80211_SCTL_SEQ;
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+ hdr->seq_ctrl = hdr->seq_ctrl &
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+ cpu_to_le16(IEEE80211_SCTL_FRAG);
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+ hdr->seq_ctrl |= cpu_to_le16(seq_number);
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+ seq_number += 0x10;
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+ /* aggregation is on for this <sta,tid> */
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+ if (info->flags & IEEE80211_TX_CTL_AMPDU &&
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+ tid_data->agg.state == IWL_AGG_ON) {
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+ txq_id = tid_data->agg.txq_id;
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+ is_agg = true;
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+ }
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+ }
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+
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+ txq = &priv(trans)->txq[txq_id];
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+ q = &txq->q;
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+
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/* Set up driver data for this TFD */
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txq->skbs[q->write_ptr] = skb;
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txq->cmd[q->write_ptr] = dev_cmd;
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@@ -1058,10 +1141,10 @@ static int iwl_trans_pcie_tx(struct iwl_priv *priv, struct sk_buff *skb,
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/* Physical address of this Tx command's header (not MAC header!),
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* within command buffer array. */
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- txcmd_phys = dma_map_single(priv->bus->dev,
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+ txcmd_phys = dma_map_single(bus(trans)->dev,
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&dev_cmd->hdr, firstlen,
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DMA_BIDIRECTIONAL);
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- if (unlikely(dma_mapping_error(priv->bus->dev, txcmd_phys)))
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+ if (unlikely(dma_mapping_error(bus(trans)->dev, txcmd_phys)))
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return -1;
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dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
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dma_unmap_len_set(out_meta, len, firstlen);
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@@ -1077,10 +1160,10 @@ static int iwl_trans_pcie_tx(struct iwl_priv *priv, struct sk_buff *skb,
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* if any (802.11 null frames have no payload). */
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secondlen = skb->len - hdr_len;
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if (secondlen > 0) {
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- phys_addr = dma_map_single(priv->bus->dev, skb->data + hdr_len,
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+ phys_addr = dma_map_single(bus(trans)->dev, skb->data + hdr_len,
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secondlen, DMA_TO_DEVICE);
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- if (unlikely(dma_mapping_error(priv->bus->dev, phys_addr))) {
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- dma_unmap_single(priv->bus->dev,
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+ if (unlikely(dma_mapping_error(bus(trans)->dev, phys_addr))) {
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+ dma_unmap_single(bus(trans)->dev,
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dma_unmap_addr(out_meta, mapping),
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dma_unmap_len(out_meta, len),
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DMA_BIDIRECTIONAL);
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@@ -1089,36 +1172,35 @@ static int iwl_trans_pcie_tx(struct iwl_priv *priv, struct sk_buff *skb,
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}
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/* Attach buffers to TFD */
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- iwlagn_txq_attach_buf_to_tfd(trans(priv), txq, txcmd_phys,
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- firstlen, 1);
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+ iwlagn_txq_attach_buf_to_tfd(trans, txq, txcmd_phys, firstlen, 1);
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if (secondlen > 0)
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- iwlagn_txq_attach_buf_to_tfd(trans(priv), txq, phys_addr,
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+ iwlagn_txq_attach_buf_to_tfd(trans, txq, phys_addr,
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secondlen, 0);
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scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
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offsetof(struct iwl_tx_cmd, scratch);
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/* take back ownership of DMA buffer to enable update */
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- dma_sync_single_for_cpu(priv->bus->dev, txcmd_phys, firstlen,
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+ dma_sync_single_for_cpu(bus(trans)->dev, txcmd_phys, firstlen,
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DMA_BIDIRECTIONAL);
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tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys);
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tx_cmd->dram_msb_ptr = iwl_get_dma_hi_addr(scratch_phys);
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- IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n",
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+ IWL_DEBUG_TX(trans, "sequence nr = 0X%x\n",
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le16_to_cpu(dev_cmd->hdr.sequence));
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- IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
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- iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd, sizeof(*tx_cmd));
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- iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len);
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+ IWL_DEBUG_TX(trans, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
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+ iwl_print_hex_dump(trans, IWL_DL_TX, (u8 *)tx_cmd, sizeof(*tx_cmd));
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+ iwl_print_hex_dump(trans, IWL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len);
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/* Set up entry for this TFD in Tx byte-count array */
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- if (ampdu)
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- iwl_trans_txq_update_byte_cnt_tbl(trans(priv), txq,
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+ if (is_agg)
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+ iwl_trans_txq_update_byte_cnt_tbl(trans, txq,
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le16_to_cpu(tx_cmd->len));
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- dma_sync_single_for_device(priv->bus->dev, txcmd_phys, firstlen,
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+ dma_sync_single_for_device(bus(trans)->dev, txcmd_phys, firstlen,
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DMA_BIDIRECTIONAL);
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- trace_iwlwifi_dev_tx(priv,
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+ trace_iwlwifi_dev_tx(priv(trans),
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&((struct iwl_tfd *)txq->tfds)[txq->q.write_ptr],
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sizeof(struct iwl_tfd),
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&dev_cmd->hdr, firstlen,
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@@ -1126,7 +1208,14 @@ static int iwl_trans_pcie_tx(struct iwl_priv *priv, struct sk_buff *skb,
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/* Tell device the write index *just past* this latest filled TFD */
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q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
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- iwl_txq_update_write_ptr(trans(priv), txq);
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+ iwl_txq_update_write_ptr(trans, txq);
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+
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+ if (ieee80211_is_data_qos(fc)) {
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+ trans->shrd->tid_data[sta_id][tid].tfds_in_queue++;
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+ if (!ieee80211_has_morefrags(fc))
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+ trans->shrd->tid_data[sta_id][tid].seq_number =
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+ seq_number;
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+ }
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/*
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* At this point the frame is "transmitted" successfully
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@@ -1137,9 +1226,9 @@ static int iwl_trans_pcie_tx(struct iwl_priv *priv, struct sk_buff *skb,
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if (iwl_queue_space(q) < q->high_mark) {
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if (wait_write_ptr) {
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txq->need_update = 1;
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- iwl_txq_update_write_ptr(trans(priv), txq);
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+ iwl_txq_update_write_ptr(trans, txq);
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} else {
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- iwl_stop_queue(priv, txq);
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+ iwl_stop_queue(priv(trans), txq);
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}
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}
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return 0;
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@@ -1262,6 +1351,23 @@ static int iwl_trans_pcie_resume(struct iwl_trans *trans)
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#endif /* CONFIG_PM */
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+static void iwl_trans_pcie_wake_any_queue(struct iwl_trans *trans,
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+ u8 ctx)
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+{
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+ u8 ac, txq_id;
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+ struct iwl_trans_pcie *trans_pcie =
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+ IWL_TRANS_GET_PCIE_TRANS(trans);
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+
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+ for (ac = 0; ac < AC_NUM; ac++) {
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+ txq_id = trans_pcie->ac_to_queue[ctx][ac];
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+ IWL_DEBUG_INFO(trans, "Queue Status: Q[%d] %s\n",
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+ ac,
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+ (atomic_read(&priv(trans)->queue_stop_count[ac]) > 0)
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+ ? "stopped" : "awake");
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+ iwl_wake_queue(priv(trans), &priv(trans)->txq[txq_id]);
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+ }
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+}
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+
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const struct iwl_trans_ops trans_ops_pcie;
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static struct iwl_trans *iwl_trans_pcie_alloc(struct iwl_shared *shrd)
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@@ -1842,6 +1948,7 @@ const struct iwl_trans_ops trans_ops_pcie = {
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.stop_device = iwl_trans_pcie_stop_device,
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.tx_start = iwl_trans_pcie_tx_start,
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+ .wake_any_queue = iwl_trans_pcie_wake_any_queue,
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.send_cmd = iwl_trans_pcie_send_cmd,
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.send_cmd_pdu = iwl_trans_pcie_send_cmd_pdu,
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