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@@ -359,6 +359,12 @@ static u16 group2_table[] = {
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"andl %"_msk",%"_LO32 _tmp"; " \
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"andl %"_msk",%"_LO32 _tmp"; " \
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"orl %"_LO32 _tmp",%"_sav"; "
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"orl %"_LO32 _tmp",%"_sav"; "
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+#ifdef CONFIG_X86_64
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+#define ON64(x) x
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+#else
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+#define ON64(x)
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+#endif
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+
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/* Raw emulation: instruction has two explicit operands. */
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/* Raw emulation: instruction has two explicit operands. */
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#define __emulate_2op_nobyte(_op,_src,_dst,_eflags,_wx,_wy,_lx,_ly,_qx,_qy) \
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#define __emulate_2op_nobyte(_op,_src,_dst,_eflags,_wx,_wy,_lx,_ly,_qx,_qy) \
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do { \
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do { \
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@@ -425,42 +431,27 @@ static u16 group2_table[] = {
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__emulate_2op_nobyte(_op, _src, _dst, _eflags, \
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__emulate_2op_nobyte(_op, _src, _dst, _eflags, \
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"w", "r", _LO32, "r", "", "r")
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"w", "r", _LO32, "r", "", "r")
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-/* Instruction has only one explicit operand (no source operand). */
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-#define emulate_1op(_op, _dst, _eflags) \
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+#define __emulate_1op(_op, _dst, _eflags, _suffix) \
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do { \
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do { \
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unsigned long _tmp; \
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unsigned long _tmp; \
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\
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\
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+ __asm__ __volatile__ ( \
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+ _PRE_EFLAGS("0", "3", "2") \
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+ _op _suffix " %1; " \
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+ _POST_EFLAGS("0", "3", "2") \
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+ : "=m" (_eflags), "+m" ((_dst).val), \
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+ "=&r" (_tmp) \
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+ : "i" (EFLAGS_MASK)); \
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+ } while (0)
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+
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+/* Instruction has only one explicit operand (no source operand). */
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+#define emulate_1op(_op, _dst, _eflags) \
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+ do { \
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switch ((_dst).bytes) { \
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switch ((_dst).bytes) { \
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- case 1: \
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- __asm__ __volatile__ ( \
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- _PRE_EFLAGS("0", "3", "2") \
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- _op"b %1; " \
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- _POST_EFLAGS("0", "3", "2") \
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- : "=m" (_eflags), "=m" ((_dst).val), \
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- "=&r" (_tmp) \
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- : "i" (EFLAGS_MASK)); \
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- break; \
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- case 2: \
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- __asm__ __volatile__ ( \
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- _PRE_EFLAGS("0", "3", "2") \
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- _op"w %1; " \
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- _POST_EFLAGS("0", "3", "2") \
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- : "=m" (_eflags), "=m" ((_dst).val), \
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- "=&r" (_tmp) \
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- : "i" (EFLAGS_MASK)); \
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- break; \
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- case 4: \
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- __asm__ __volatile__ ( \
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- _PRE_EFLAGS("0", "3", "2") \
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- _op"l %1; " \
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- _POST_EFLAGS("0", "3", "2") \
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- : "=m" (_eflags), "=m" ((_dst).val), \
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- "=&r" (_tmp) \
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- : "i" (EFLAGS_MASK)); \
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- break; \
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- case 8: \
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- __emulate_1op_8byte(_op, _dst, _eflags); \
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- break; \
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+ case 1: __emulate_1op(_op, _dst, _eflags, "b"); break; \
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+ case 2: __emulate_1op(_op, _dst, _eflags, "w"); break; \
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+ case 4: __emulate_1op(_op, _dst, _eflags, "l"); break; \
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+ case 8: ON64(__emulate_1op(_op, _dst, _eflags, "q")); break; \
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} \
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} \
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} while (0)
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} while (0)
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@@ -476,19 +467,8 @@ static u16 group2_table[] = {
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: _qy ((_src).val), "i" (EFLAGS_MASK)); \
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: _qy ((_src).val), "i" (EFLAGS_MASK)); \
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} while (0)
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} while (0)
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-#define __emulate_1op_8byte(_op, _dst, _eflags) \
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- do { \
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- __asm__ __volatile__ ( \
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- _PRE_EFLAGS("0", "3", "2") \
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- _op"q %1; " \
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- _POST_EFLAGS("0", "3", "2") \
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- : "=m" (_eflags), "=m" ((_dst).val), "=&r" (_tmp) \
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- : "i" (EFLAGS_MASK)); \
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- } while (0)
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-
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#elif defined(__i386__)
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#elif defined(__i386__)
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#define __emulate_2op_8byte(_op, _src, _dst, _eflags, _qx, _qy)
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#define __emulate_2op_8byte(_op, _src, _dst, _eflags, _qx, _qy)
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-#define __emulate_1op_8byte(_op, _dst, _eflags)
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#endif /* __i386__ */
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#endif /* __i386__ */
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/* Fetch next part of the instruction being emulated. */
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/* Fetch next part of the instruction being emulated. */
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