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@@ -79,7 +79,6 @@ void set_mtrr_ops(const struct mtrr_ops *ops)
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static int have_wrcomb(void)
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{
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struct pci_dev *dev;
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- u8 rev;
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dev = pci_get_class(PCI_CLASS_BRIDGE_HOST << 8, NULL);
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if (dev != NULL) {
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@@ -89,13 +88,11 @@ static int have_wrcomb(void)
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* chipsets to be tagged
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*/
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if (dev->vendor == PCI_VENDOR_ID_SERVERWORKS &&
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- dev->device == PCI_DEVICE_ID_SERVERWORKS_LE) {
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- pci_read_config_byte(dev, PCI_CLASS_REVISION, &rev);
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- if (rev <= 5) {
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- pr_info("mtrr: Serverworks LE rev < 6 detected. Write-combining disabled.\n");
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- pci_dev_put(dev);
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- return 0;
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- }
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+ dev->device == PCI_DEVICE_ID_SERVERWORKS_LE &&
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+ dev->revision <= 5) {
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+ pr_info("mtrr: Serverworks LE rev < 6 detected. Write-combining disabled.\n");
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+ pci_dev_put(dev);
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+ return 0;
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}
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/*
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* Intel 450NX errata # 23. Non ascending cacheline evictions to
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@@ -137,55 +134,43 @@ static void __init init_table(void)
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}
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struct set_mtrr_data {
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- atomic_t count;
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- atomic_t gate;
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unsigned long smp_base;
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unsigned long smp_size;
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unsigned int smp_reg;
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mtrr_type smp_type;
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};
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-static DEFINE_PER_CPU(struct cpu_stop_work, mtrr_work);
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-
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/**
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- * mtrr_work_handler - Synchronisation handler. Executed by "other" CPUs.
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+ * mtrr_rendezvous_handler - Work done in the synchronization handler. Executed
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+ * by all the CPUs.
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* @info: pointer to mtrr configuration data
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*
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* Returns nothing.
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*/
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-static int mtrr_work_handler(void *info)
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+static int mtrr_rendezvous_handler(void *info)
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{
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#ifdef CONFIG_SMP
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struct set_mtrr_data *data = info;
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- unsigned long flags;
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-
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- atomic_dec(&data->count);
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- while (!atomic_read(&data->gate))
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- cpu_relax();
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-
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- local_irq_save(flags);
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-
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- atomic_dec(&data->count);
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- while (atomic_read(&data->gate))
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- cpu_relax();
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- /* The master has cleared me to execute */
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+ /*
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+ * We use this same function to initialize the mtrrs during boot,
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+ * resume, runtime cpu online and on an explicit request to set a
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+ * specific MTRR.
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+ *
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+ * During boot or suspend, the state of the boot cpu's mtrrs has been
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+ * saved, and we want to replicate that across all the cpus that come
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+ * online (either at the end of boot or resume or during a runtime cpu
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+ * online). If we're doing that, @reg is set to something special and on
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+ * all the cpu's we do mtrr_if->set_all() (On the logical cpu that
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+ * started the boot/resume sequence, this might be a duplicate
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+ * set_all()).
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+ */
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if (data->smp_reg != ~0U) {
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mtrr_if->set(data->smp_reg, data->smp_base,
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data->smp_size, data->smp_type);
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- } else if (mtrr_aps_delayed_init) {
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- /*
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- * Initialize the MTRRs inaddition to the synchronisation.
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- */
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+ } else if (mtrr_aps_delayed_init || !cpu_online(smp_processor_id())) {
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mtrr_if->set_all();
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}
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-
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- atomic_dec(&data->count);
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- while (!atomic_read(&data->gate))
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- cpu_relax();
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-
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- atomic_dec(&data->count);
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- local_irq_restore(flags);
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#endif
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return 0;
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}
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@@ -223,20 +208,11 @@ static inline int types_compatible(mtrr_type type1, mtrr_type type2)
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* 14. Wait for buddies to catch up
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* 15. Enable interrupts.
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*
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- * What does that mean for us? Well, first we set data.count to the number
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- * of CPUs. As each CPU announces that it started the rendezvous handler by
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- * decrementing the count, We reset data.count and set the data.gate flag
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- * allowing all the cpu's to proceed with the work. As each cpu disables
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- * interrupts, it'll decrement data.count once. We wait until it hits 0 and
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- * proceed. We clear the data.gate flag and reset data.count. Meanwhile, they
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- * are waiting for that flag to be cleared. Once it's cleared, each
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- * CPU goes through the transition of updating MTRRs.
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- * The CPU vendors may each do it differently,
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- * so we call mtrr_if->set() callback and let them take care of it.
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- * When they're done, they again decrement data->count and wait for data.gate
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- * to be set.
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- * When we finish, we wait for data.count to hit 0 and toggle the data.gate flag
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- * Everyone then enables interrupts and we all continue on.
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+ * What does that mean for us? Well, stop_machine() will ensure that
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+ * the rendezvous handler is started on each CPU. And in lockstep they
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+ * do the state transition of disabling interrupts, updating MTRR's
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+ * (the CPU vendors may each do it differently, so we call mtrr_if->set()
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+ * callback and let them take care of it.) and enabling interrupts.
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*
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* Note that the mechanism is the same for UP systems, too; all the SMP stuff
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* becomes nops.
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@@ -244,92 +220,26 @@ static inline int types_compatible(mtrr_type type1, mtrr_type type2)
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static void
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set_mtrr(unsigned int reg, unsigned long base, unsigned long size, mtrr_type type)
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{
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- struct set_mtrr_data data;
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- unsigned long flags;
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- int cpu;
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-
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- preempt_disable();
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-
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- data.smp_reg = reg;
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- data.smp_base = base;
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- data.smp_size = size;
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- data.smp_type = type;
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- atomic_set(&data.count, num_booting_cpus() - 1);
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-
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- /* Make sure data.count is visible before unleashing other CPUs */
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- smp_wmb();
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- atomic_set(&data.gate, 0);
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-
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- /* Start the ball rolling on other CPUs */
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- for_each_online_cpu(cpu) {
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- struct cpu_stop_work *work = &per_cpu(mtrr_work, cpu);
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-
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- if (cpu == smp_processor_id())
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- continue;
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-
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- stop_one_cpu_nowait(cpu, mtrr_work_handler, &data, work);
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- }
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-
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-
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- while (atomic_read(&data.count))
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- cpu_relax();
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-
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- /* Ok, reset count and toggle gate */
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- atomic_set(&data.count, num_booting_cpus() - 1);
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- smp_wmb();
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- atomic_set(&data.gate, 1);
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-
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- local_irq_save(flags);
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-
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- while (atomic_read(&data.count))
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- cpu_relax();
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-
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- /* Ok, reset count and toggle gate */
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- atomic_set(&data.count, num_booting_cpus() - 1);
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- smp_wmb();
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- atomic_set(&data.gate, 0);
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-
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- /* Do our MTRR business */
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-
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- /*
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- * HACK!
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- *
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- * We use this same function to initialize the mtrrs during boot,
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- * resume, runtime cpu online and on an explicit request to set a
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- * specific MTRR.
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- *
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- * During boot or suspend, the state of the boot cpu's mtrrs has been
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- * saved, and we want to replicate that across all the cpus that come
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- * online (either at the end of boot or resume or during a runtime cpu
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- * online). If we're doing that, @reg is set to something special and on
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- * this cpu we still do mtrr_if->set_all(). During boot/resume, this
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- * is unnecessary if at this point we are still on the cpu that started
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- * the boot/resume sequence. But there is no guarantee that we are still
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- * on the same cpu. So we do mtrr_if->set_all() on this cpu aswell to be
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- * sure that we are in sync with everyone else.
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- */
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- if (reg != ~0U)
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- mtrr_if->set(reg, base, size, type);
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- else
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- mtrr_if->set_all();
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+ struct set_mtrr_data data = { .smp_reg = reg,
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+ .smp_base = base,
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+ .smp_size = size,
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+ .smp_type = type
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+ };
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- /* Wait for the others */
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- while (atomic_read(&data.count))
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- cpu_relax();
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-
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- atomic_set(&data.count, num_booting_cpus() - 1);
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- smp_wmb();
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- atomic_set(&data.gate, 1);
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-
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- /*
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- * Wait here for everyone to have seen the gate change
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- * So we're the last ones to touch 'data'
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- */
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- while (atomic_read(&data.count))
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- cpu_relax();
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+ stop_machine(mtrr_rendezvous_handler, &data, cpu_online_mask);
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+}
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- local_irq_restore(flags);
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- preempt_enable();
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+static void set_mtrr_from_inactive_cpu(unsigned int reg, unsigned long base,
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+ unsigned long size, mtrr_type type)
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+{
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+ struct set_mtrr_data data = { .smp_reg = reg,
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+ .smp_base = base,
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+ .smp_size = size,
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+ .smp_type = type
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+ };
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+
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+ stop_machine_from_inactive_cpu(mtrr_rendezvous_handler, &data,
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+ cpu_callout_mask);
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}
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/**
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@@ -783,7 +693,7 @@ void mtrr_ap_init(void)
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* 2. cpu hotadd time. We let mtrr_add/del_page hold cpuhotplug
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* lock to prevent mtrr entry changes
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*/
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- set_mtrr(~0U, 0, 0, 0);
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+ set_mtrr_from_inactive_cpu(~0U, 0, 0, 0);
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}
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/**
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