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@@ -79,7 +79,6 @@ void set_mtrr_ops(const struct mtrr_ops *ops)
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static int have_wrcomb(void)
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{
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struct pci_dev *dev;
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- u8 rev;
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dev = pci_get_class(PCI_CLASS_BRIDGE_HOST << 8, NULL);
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if (dev != NULL) {
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@@ -89,13 +88,11 @@ static int have_wrcomb(void)
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* chipsets to be tagged
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*/
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if (dev->vendor == PCI_VENDOR_ID_SERVERWORKS &&
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- dev->device == PCI_DEVICE_ID_SERVERWORKS_LE) {
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- pci_read_config_byte(dev, PCI_CLASS_REVISION, &rev);
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- if (rev <= 5) {
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- pr_info("mtrr: Serverworks LE rev < 6 detected. Write-combining disabled.\n");
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- pci_dev_put(dev);
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- return 0;
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- }
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+ dev->device == PCI_DEVICE_ID_SERVERWORKS_LE &&
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+ dev->revision <= 5) {
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+ pr_info("mtrr: Serverworks LE rev < 6 detected. Write-combining disabled.\n");
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+ pci_dev_put(dev);
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+ return 0;
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}
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/*
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* Intel 450NX errata # 23. Non ascending cacheline evictions to
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