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@@ -483,8 +483,14 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
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atom_execute_table(rdev->mode_info.atom_context,
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index, (uint32_t *)&adjust_pll_args);
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adjusted_clock = le16_to_cpu(adjust_pll_args.usPixelClock) * 10;
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- } else
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- adjusted_clock = mode->clock;
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+ } else {
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+ /* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */
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+ if (ASIC_IS_AVIVO(rdev) &&
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+ (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1))
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+ adjusted_clock = mode->clock * 2;
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+ else
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+ adjusted_clock = mode->clock;
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+ }
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if (radeon_crtc->crtc_id == 0)
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pll = &rdev->clock.p1pll;
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