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@@ -655,6 +655,16 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
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p1pll->pll_out_min = 64800;
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else
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p1pll->pll_out_min = 20000;
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+ } else if (p1pll->pll_out_min > 64800) {
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+ /* Limiting the pll output range is a good thing generally as
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+ * it limits the number of possible pll combinations for a given
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+ * frequency presumably to the ones that work best on each card.
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+ * However, certain duallink DVI monitors seem to like
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+ * pll combinations that would be limited by this at least on
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+ * pre-DCE 3.0 r6xx hardware. This might need to be adjusted per
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+ * family.
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+ */
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+ p1pll->pll_out_min = 64800;
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}
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p1pll->pll_in_min =
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