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@@ -67,7 +67,15 @@ void __init r8a7790_pinmux_init(void)
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, \
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}
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-enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1 };
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+#define HSCIF_DATA(index, baseaddr, irq) \
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+[index] = { \
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+ SCIF_COMMON(PORT_HSCIF, baseaddr, irq), \
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+ .scbrr_algo_id = SCBRR_ALGO_6, \
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+ .scscr = SCSCR_RE | SCSCR_TE, \
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+}
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+
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+enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1,
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+ HSCIF0, HSCIF1 };
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static const struct plat_sci_port scif[] = {
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SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
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@@ -78,6 +86,8 @@ static const struct plat_sci_port scif[] = {
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SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */
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SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */
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SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */
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+ HSCIF_DATA(HSCIF0, 0xe62c0000, gic_spi(154)), /* HSCIF0 */
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+ HSCIF_DATA(HSCIF1, 0xe62c8000, gic_spi(155)), /* HSCIF1 */
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};
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static inline void r8a7790_register_scif(int idx)
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@@ -115,6 +125,8 @@ void __init r8a7790_add_standard_devices(void)
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r8a7790_register_scif(SCIFA2);
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r8a7790_register_scif(SCIF0);
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r8a7790_register_scif(SCIF1);
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+ r8a7790_register_scif(HSCIF0);
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+ r8a7790_register_scif(HSCIF1);
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r8a7790_register_irqc(0);
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}
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