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@@ -203,43 +203,42 @@ static int cx18_av_reset(struct v4l2_subdev *sd, u32 val)
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static int cx18_av_init(struct v4l2_subdev *sd, u32 val)
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{
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- struct cx18_av_state *state = to_cx18_av_state(sd);
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struct cx18 *cx = v4l2_get_subdevdata(sd);
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- switch (val) {
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- case CX18_AV_INIT_PLLS:
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- /*
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- * The crystal freq used in calculations in this driver will be
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- * 28.636360 MHz.
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- * Aim to run the PLLs' VCOs near 400 MHz to minimze errors.
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- */
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+ /*
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+ * The crystal freq used in calculations in this driver will be
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+ * 28.636360 MHz.
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+ * Aim to run the PLLs' VCOs near 400 MHz to minimze errors.
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+ */
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- /*
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- * VDCLK Integer = 0x0f, Post Divider = 0x04
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- * AIMCLK Integer = 0x0e, Post Divider = 0x16
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- */
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- cx18_av_write4(cx, CXADEC_PLL_CTRL1, 0x160e040f);
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+ /*
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+ * VDCLK Integer = 0x0f, Post Divider = 0x04
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+ * AIMCLK Integer = 0x0e, Post Divider = 0x16
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+ */
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+ cx18_av_write4(cx, CXADEC_PLL_CTRL1, 0x160e040f);
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- /* VDCLK Fraction = 0x2be2fe */
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- /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz before post divide */
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- cx18_av_write4(cx, CXADEC_VID_PLL_FRAC, 0x002be2fe);
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+ /* VDCLK Fraction = 0x2be2fe */
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+ /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz before post divide */
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+ cx18_av_write4(cx, CXADEC_VID_PLL_FRAC, 0x002be2fe);
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- /* AIMCLK Fraction = 0x05227ad */
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- /* xtal * 0xe.2913d68/0x16 = 48000 * 384: 406 MHz pre post-div*/
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- cx18_av_write4(cx, CXADEC_AUX_PLL_FRAC, 0x005227ad);
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+ /* AIMCLK Fraction = 0x05227ad */
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+ /* xtal * 0xe.2913d68/0x16 = 48000 * 384: 406 MHz pre post-div*/
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+ cx18_av_write4(cx, CXADEC_AUX_PLL_FRAC, 0x005227ad);
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- /* SA_MCLK_SEL=1, SA_MCLK_DIV=0x16 */
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- cx18_av_write(cx, CXADEC_I2S_MCLK, 0x56);
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- break;
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+ /* SA_MCLK_SEL=1, SA_MCLK_DIV=0x16 */
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+ cx18_av_write(cx, CXADEC_I2S_MCLK, 0x56);
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+ return 0;
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+}
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- case CX18_AV_INIT_NORMAL:
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- default:
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- if (!state->is_initialized) {
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- /* initialize on first use */
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- state->is_initialized = 1;
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- cx18_av_initialize(cx);
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- }
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- break;
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+static int cx18_av_load_fw(struct v4l2_subdev *sd)
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+{
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+ struct cx18_av_state *state = to_cx18_av_state(sd);
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+ struct cx18 *cx = v4l2_get_subdevdata(sd);
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+
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+ if (!state->is_initialized) {
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+ /* initialize on first use */
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+ state->is_initialized = 1;
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+ cx18_av_initialize(cx);
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}
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return 0;
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}
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@@ -1185,6 +1184,7 @@ static const struct v4l2_subdev_core_ops cx18_av_general_ops = {
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.g_chip_ident = cx18_av_g_chip_ident,
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.log_status = cx18_av_log_status,
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.init = cx18_av_init,
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+ .load_fw = cx18_av_load_fw,
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.reset = cx18_av_reset,
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.queryctrl = cx18_av_queryctrl,
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.g_ctrl = cx18_av_g_ctrl,
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