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@@ -59,7 +59,6 @@
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#define REG_PIH_ISR_P2 0x02
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#define REG_PIH_SIR 0x03 /* for testing */
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-
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/* Linux could (eventually) use either IRQ line */
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static int irq_line;
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@@ -111,7 +110,8 @@ static int nr_sih_modules;
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#define TWL4030_MODULE_INT_PWR TWL4030_MODULE_INT
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-/* Order in this table matches order in PIH_ISR. That is,
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+/*
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+ * Order in this table matches order in PIH_ISR. That is,
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* BIT(n) in PIH_ISR is sih_modules[n].
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*/
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/* sih_modules_twl4030 is used both in twl4030 and twl5030 */
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@@ -309,6 +309,7 @@ static irqreturn_t handle_twl4030_pih(int irq, void *devid)
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return IRQ_HANDLED;
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}
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+
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/*----------------------------------------------------------------------*/
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/*
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@@ -337,7 +338,6 @@ static int twl4030_init_sih_modules(unsigned line)
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memset(buf, 0xff, sizeof buf);
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sih = sih_modules;
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for (i = 0; i < nr_sih_modules; i++, sih++) {
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-
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/* skip USB -- it's funky */
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if (!sih->bytes_ixr)
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continue;
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@@ -352,7 +352,8 @@ static int twl4030_init_sih_modules(unsigned line)
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pr_err("twl4030: err %d initializing %s %s\n",
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status, sih->name, "IMR");
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- /* Maybe disable "exclusive" mode; buffer second pending irq;
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+ /*
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+ * Maybe disable "exclusive" mode; buffer second pending irq;
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* set Clear-On-Read (COR) bit.
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*
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* NOTE that sometimes COR polarity is documented as being
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@@ -382,7 +383,8 @@ static int twl4030_init_sih_modules(unsigned line)
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if (sih->irq_lines <= line)
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continue;
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- /* Clear pending interrupt status. Either the read was
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+ /*
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+ * Clear pending interrupt status. Either the read was
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* enough, or we need to write those bits. Repeat, in
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* case an IRQ is pending (PENDDIS=0) ... that's not
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* uncommon with PWR_INT.PWRON.
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@@ -398,7 +400,8 @@ static int twl4030_init_sih_modules(unsigned line)
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status = twl_i2c_write(sih->module, buf,
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sih->mask[line].isr_offset,
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sih->bytes_ixr);
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- /* else COR=1 means read sufficed.
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+ /*
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+ * else COR=1 means read sufficed.
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* (for most SIH modules...)
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*/
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}
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@@ -410,7 +413,8 @@ static int twl4030_init_sih_modules(unsigned line)
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static inline void activate_irq(int irq)
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{
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#ifdef CONFIG_ARM
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- /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
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+ /*
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+ * ARM requires an extra step to clear IRQ_NOREQUEST, which it
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* sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
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*/
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set_irq_flags(irq, IRQF_VALID);
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@@ -622,9 +626,7 @@ static irqreturn_t handle_twl4030_sih(int irq, void *data)
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static unsigned twl4030_irq_next;
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-/* returns the first IRQ used by this SIH bank,
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- * or negative errno
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- */
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+/* returns the first IRQ used by this SIH bank, or negative errno */
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int twl4030_sih_setup(int module)
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{
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int sih_mod;
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@@ -688,7 +690,6 @@ int twl4030_sih_setup(int module)
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/* FIXME need a call to reverse twl4030_sih_setup() ... */
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-
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/*----------------------------------------------------------------------*/
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/* FIXME pass in which interrupt line we'll use ... */
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@@ -711,7 +712,8 @@ int twl4030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end)
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twl4030_irq_base = irq_base;
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- /* install an irq handler for each of the SIH modules;
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+ /*
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+ * install an irq handler for each of the SIH modules;
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* clone dummy irq_chip since PIH can't *do* anything
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*/
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twl4030_irq_chip = dummy_irq_chip;
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Felipe Contreras