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@@ -63,7 +63,7 @@ static inline void rt73usb_register_read(struct rt2x00_dev *rt2x00dev,
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__le32 reg;
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rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
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USB_VENDOR_REQUEST_IN, offset,
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- ®, sizeof(u32), REGISTER_TIMEOUT);
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+ ®, sizeof(reg), REGISTER_TIMEOUT);
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*value = le32_to_cpu(reg);
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}
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@@ -73,7 +73,7 @@ static inline void rt73usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
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__le32 reg;
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rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
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USB_VENDOR_REQUEST_IN, offset,
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- ®, sizeof(u32), REGISTER_TIMEOUT);
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+ ®, sizeof(reg), REGISTER_TIMEOUT);
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*value = le32_to_cpu(reg);
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}
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@@ -93,7 +93,7 @@ static inline void rt73usb_register_write(struct rt2x00_dev *rt2x00dev,
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__le32 reg = cpu_to_le32(value);
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rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
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USB_VENDOR_REQUEST_OUT, offset,
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- ®, sizeof(u32), REGISTER_TIMEOUT);
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+ ®, sizeof(reg), REGISTER_TIMEOUT);
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}
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static inline void rt73usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
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@@ -102,7 +102,7 @@ static inline void rt73usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
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__le32 reg = cpu_to_le32(value);
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rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
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USB_VENDOR_REQUEST_OUT, offset,
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- ®, sizeof(u32), REGISTER_TIMEOUT);
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+ ®, sizeof(reg), REGISTER_TIMEOUT);
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}
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static inline void rt73usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
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@@ -115,21 +115,32 @@ static inline void rt73usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
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REGISTER_TIMEOUT32(length));
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}
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-static u32 rt73usb_bbp_check(struct rt2x00_dev *rt2x00dev)
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+static int rt73usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
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+ const unsigned int offset,
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+ struct rt2x00_field32 field,
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+ u32 *reg)
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{
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- u32 reg;
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unsigned int i;
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for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
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- rt73usb_register_read_lock(rt2x00dev, PHY_CSR3, ®);
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- if (!rt2x00_get_field32(reg, PHY_CSR3_BUSY))
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- break;
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+ rt73usb_register_read_lock(rt2x00dev, offset, reg);
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+ if (!rt2x00_get_field32(*reg, field))
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+ return 1;
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udelay(REGISTER_BUSY_DELAY);
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}
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- return reg;
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+ ERROR(rt2x00dev, "Indirect register access failed: "
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+ "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
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+ *reg = ~0;
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+
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+ return 0;
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}
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+#define WAIT_FOR_BBP(__dev, __reg) \
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+ rt73usb_regbusy_read((__dev), PHY_CSR3, PHY_CSR3_BUSY, (__reg))
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+#define WAIT_FOR_RF(__dev, __reg) \
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+ rt73usb_regbusy_read((__dev), PHY_CSR4, PHY_CSR4_BUSY, (__reg))
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+
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static void rt73usb_bbp_write(struct rt2x00_dev *rt2x00dev,
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const unsigned int word, const u8 value)
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{
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@@ -138,30 +149,20 @@ static void rt73usb_bbp_write(struct rt2x00_dev *rt2x00dev,
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mutex_lock(&rt2x00dev->csr_mutex);
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/*
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- * Wait until the BBP becomes ready.
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+ * Wait until the BBP becomes available, afterwards we
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+ * can safely write the new data into the register.
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*/
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- reg = rt73usb_bbp_check(rt2x00dev);
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- if (rt2x00_get_field32(reg, PHY_CSR3_BUSY))
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- goto exit_fail;
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-
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- /*
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- * Write the data into the BBP.
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- */
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- reg = 0;
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- rt2x00_set_field32(®, PHY_CSR3_VALUE, value);
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- rt2x00_set_field32(®, PHY_CSR3_REGNUM, word);
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- rt2x00_set_field32(®, PHY_CSR3_BUSY, 1);
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- rt2x00_set_field32(®, PHY_CSR3_READ_CONTROL, 0);
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-
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- rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
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- mutex_unlock(&rt2x00dev->csr_mutex);
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-
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- return;
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+ if (WAIT_FOR_BBP(rt2x00dev, ®)) {
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+ reg = 0;
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+ rt2x00_set_field32(®, PHY_CSR3_VALUE, value);
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+ rt2x00_set_field32(®, PHY_CSR3_REGNUM, word);
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+ rt2x00_set_field32(®, PHY_CSR3_BUSY, 1);
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+ rt2x00_set_field32(®, PHY_CSR3_READ_CONTROL, 0);
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+
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+ rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
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+ }
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-exit_fail:
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mutex_unlock(&rt2x00dev->csr_mutex);
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-
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- ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n");
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}
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static void rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev,
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@@ -172,79 +173,59 @@ static void rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev,
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mutex_lock(&rt2x00dev->csr_mutex);
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/*
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- * Wait until the BBP becomes ready.
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+ * Wait until the BBP becomes available, afterwards we
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+ * can safely write the read request into the register.
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+ * After the data has been written, we wait until hardware
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+ * returns the correct value, if at any time the register
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+ * doesn't become available in time, reg will be 0xffffffff
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+ * which means we return 0xff to the caller.
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*/
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- reg = rt73usb_bbp_check(rt2x00dev);
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- if (rt2x00_get_field32(reg, PHY_CSR3_BUSY))
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- goto exit_fail;
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+ if (WAIT_FOR_BBP(rt2x00dev, ®)) {
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+ reg = 0;
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+ rt2x00_set_field32(®, PHY_CSR3_REGNUM, word);
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+ rt2x00_set_field32(®, PHY_CSR3_BUSY, 1);
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+ rt2x00_set_field32(®, PHY_CSR3_READ_CONTROL, 1);
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- /*
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- * Write the request into the BBP.
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- */
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- reg = 0;
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- rt2x00_set_field32(®, PHY_CSR3_REGNUM, word);
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- rt2x00_set_field32(®, PHY_CSR3_BUSY, 1);
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- rt2x00_set_field32(®, PHY_CSR3_READ_CONTROL, 1);
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+ rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
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- rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
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-
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- /*
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- * Wait until the BBP becomes ready.
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- */
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- reg = rt73usb_bbp_check(rt2x00dev);
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- if (rt2x00_get_field32(reg, PHY_CSR3_BUSY))
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- goto exit_fail;
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+ WAIT_FOR_BBP(rt2x00dev, ®);
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+ }
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*value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
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- mutex_unlock(&rt2x00dev->csr_mutex);
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-
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- return;
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-exit_fail:
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mutex_unlock(&rt2x00dev->csr_mutex);
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-
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- ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
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- *value = 0xff;
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}
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static void rt73usb_rf_write(struct rt2x00_dev *rt2x00dev,
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const unsigned int word, const u32 value)
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{
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u32 reg;
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- unsigned int i;
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if (!word)
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return;
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mutex_lock(&rt2x00dev->csr_mutex);
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- for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
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- rt73usb_register_read_lock(rt2x00dev, PHY_CSR4, ®);
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- if (!rt2x00_get_field32(reg, PHY_CSR4_BUSY))
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- goto rf_write;
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- udelay(REGISTER_BUSY_DELAY);
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- }
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-
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- mutex_unlock(&rt2x00dev->csr_mutex);
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- ERROR(rt2x00dev, "PHY_CSR4 register busy. Write failed.\n");
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- return;
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-
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-rf_write:
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- reg = 0;
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- rt2x00_set_field32(®, PHY_CSR4_VALUE, value);
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-
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/*
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- * RF5225 and RF2527 contain 21 bits per RF register value,
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- * all others contain 20 bits.
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+ * Wait until the RF becomes available, afterwards we
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+ * can safely write the new data into the register.
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*/
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- rt2x00_set_field32(®, PHY_CSR4_NUMBER_OF_BITS,
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- 20 + (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
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- rt2x00_rf(&rt2x00dev->chip, RF2527)));
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- rt2x00_set_field32(®, PHY_CSR4_IF_SELECT, 0);
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- rt2x00_set_field32(®, PHY_CSR4_BUSY, 1);
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-
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- rt73usb_register_write_lock(rt2x00dev, PHY_CSR4, reg);
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- rt2x00_rf_write(rt2x00dev, word, value);
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+ if (WAIT_FOR_RF(rt2x00dev, ®)) {
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+ reg = 0;
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+ rt2x00_set_field32(®, PHY_CSR4_VALUE, value);
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+ /*
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+ * RF5225 and RF2527 contain 21 bits per RF register value,
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+ * all others contain 20 bits.
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+ */
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+ rt2x00_set_field32(®, PHY_CSR4_NUMBER_OF_BITS,
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+ 20 + (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
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+ rt2x00_rf(&rt2x00dev->chip, RF2527)));
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+ rt2x00_set_field32(®, PHY_CSR4_IF_SELECT, 0);
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+ rt2x00_set_field32(®, PHY_CSR4_BUSY, 1);
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+
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+ rt73usb_register_write_lock(rt2x00dev, PHY_CSR4, reg);
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+ rt2x00_rf_write(rt2x00dev, word, value);
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+ }
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mutex_unlock(&rt2x00dev->csr_mutex);
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}
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