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@@ -43,37 +43,37 @@
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*/
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static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
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0x00, /* this register not used */
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- 0x91, /* REG_CODEC_MODE (0x1) */
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- 0xc3, /* REG_OPTION (0x2) */
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+ 0x00, /* REG_CODEC_MODE (0x1) */
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+ 0x00, /* REG_OPTION (0x2) */
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0x00, /* REG_UNKNOWN (0x3) */
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0x00, /* REG_MICBIAS_CTL (0x4) */
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- 0x20, /* REG_ANAMICL (0x5) */
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+ 0x00, /* REG_ANAMICL (0x5) */
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0x00, /* REG_ANAMICR (0x6) */
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0x00, /* REG_AVADC_CTL (0x7) */
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0x00, /* REG_ADCMICSEL (0x8) */
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0x00, /* REG_DIGMIXING (0x9) */
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- 0x0c, /* REG_ATXL1PGA (0xA) */
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- 0x0c, /* REG_ATXR1PGA (0xB) */
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- 0x00, /* REG_AVTXL2PGA (0xC) */
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- 0x00, /* REG_AVTXR2PGA (0xD) */
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+ 0x0f, /* REG_ATXL1PGA (0xA) */
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+ 0x0f, /* REG_ATXR1PGA (0xB) */
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+ 0x0f, /* REG_AVTXL2PGA (0xC) */
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+ 0x0f, /* REG_AVTXR2PGA (0xD) */
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0x00, /* REG_AUDIO_IF (0xE) */
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0x00, /* REG_VOICE_IF (0xF) */
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- 0x00, /* REG_ARXR1PGA (0x10) */
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- 0x00, /* REG_ARXL1PGA (0x11) */
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- 0x6c, /* REG_ARXR2PGA (0x12) */
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- 0x6c, /* REG_ARXL2PGA (0x13) */
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- 0x00, /* REG_VRXPGA (0x14) */
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+ 0x3f, /* REG_ARXR1PGA (0x10) */
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+ 0x3f, /* REG_ARXL1PGA (0x11) */
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+ 0x3f, /* REG_ARXR2PGA (0x12) */
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+ 0x3f, /* REG_ARXL2PGA (0x13) */
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+ 0x25, /* REG_VRXPGA (0x14) */
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0x00, /* REG_VSTPGA (0x15) */
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0x00, /* REG_VRX2ARXPGA (0x16) */
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0x00, /* REG_AVDAC_CTL (0x17) */
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0x00, /* REG_ARX2VTXPGA (0x18) */
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- 0x00, /* REG_ARXL1_APGA_CTL (0x19) */
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- 0x00, /* REG_ARXR1_APGA_CTL (0x1A) */
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- 0x4a, /* REG_ARXL2_APGA_CTL (0x1B) */
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- 0x4a, /* REG_ARXR2_APGA_CTL (0x1C) */
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+ 0x32, /* REG_ARXL1_APGA_CTL (0x19) */
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+ 0x32, /* REG_ARXR1_APGA_CTL (0x1A) */
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+ 0x32, /* REG_ARXL2_APGA_CTL (0x1B) */
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+ 0x32, /* REG_ARXR2_APGA_CTL (0x1C) */
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0x00, /* REG_ATX2ARXPGA (0x1D) */
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0x00, /* REG_BT_IF (0x1E) */
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- 0x00, /* REG_BTPGA (0x1F) */
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+ 0x55, /* REG_BTPGA (0x1F) */
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0x00, /* REG_BTSTPGA (0x20) */
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0x00, /* REG_EAR_CTL (0x21) */
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0x00, /* REG_HS_SEL (0x22) */
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@@ -85,32 +85,32 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
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0x00, /* REG_PRECKR_CTL (0x28) */
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0x00, /* REG_HFL_CTL (0x29) */
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0x00, /* REG_HFR_CTL (0x2A) */
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- 0x00, /* REG_ALC_CTL (0x2B) */
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+ 0x05, /* REG_ALC_CTL (0x2B) */
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0x00, /* REG_ALC_SET1 (0x2C) */
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0x00, /* REG_ALC_SET2 (0x2D) */
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0x00, /* REG_BOOST_CTL (0x2E) */
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0x00, /* REG_SOFTVOL_CTL (0x2F) */
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- 0x00, /* REG_DTMF_FREQSEL (0x30) */
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+ 0x13, /* REG_DTMF_FREQSEL (0x30) */
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0x00, /* REG_DTMF_TONEXT1H (0x31) */
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0x00, /* REG_DTMF_TONEXT1L (0x32) */
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0x00, /* REG_DTMF_TONEXT2H (0x33) */
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0x00, /* REG_DTMF_TONEXT2L (0x34) */
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- 0x00, /* REG_DTMF_TONOFF (0x35) */
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- 0x00, /* REG_DTMF_WANONOFF (0x36) */
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+ 0x79, /* REG_DTMF_TONOFF (0x35) */
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+ 0x11, /* REG_DTMF_WANONOFF (0x36) */
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0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
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0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
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0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
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0x06, /* REG_APLL_CTL (0x3A) */
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0x00, /* REG_DTMF_CTL (0x3B) */
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- 0x00, /* REG_DTMF_PGA_CTL2 (0x3C) */
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- 0x00, /* REG_DTMF_PGA_CTL1 (0x3D) */
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+ 0x44, /* REG_DTMF_PGA_CTL2 (0x3C) */
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+ 0x69, /* REG_DTMF_PGA_CTL1 (0x3D) */
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0x00, /* REG_MISC_SET_1 (0x3E) */
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0x00, /* REG_PCMBTMUX (0x3F) */
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0x00, /* not used (0x40) */
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0x00, /* not used (0x41) */
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0x00, /* not used (0x42) */
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0x00, /* REG_RX_PATH_SEL (0x43) */
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- 0x00, /* REG_VDL_APGA_CTL (0x44) */
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+ 0x32, /* REG_VDL_APGA_CTL (0x44) */
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0x00, /* REG_VIBRA_CTL (0x45) */
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0x00, /* REG_VIBRA_SET (0x46) */
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0x00, /* REG_VIBRA_PWM_SET (0x47) */
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@@ -244,58 +244,93 @@ static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
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udelay(10);
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}
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-static void twl4030_init_chip(struct snd_soc_codec *codec)
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+static inline void twl4030_check_defaults(struct snd_soc_codec *codec)
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{
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- u8 *cache = codec->reg_cache;
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- int i;
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+ int i, difference = 0;
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+ u8 val;
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+
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+ dev_dbg(codec->dev, "Checking TWL audio default configuration\n");
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+ for (i = 1; i <= TWL4030_REG_MISC_SET_2; i++) {
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+ twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &val, i);
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+ if (val != twl4030_reg[i]) {
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+ difference++;
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+ dev_dbg(codec->dev,
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+ "Reg 0x%02x: chip: 0x%02x driver: 0x%02x\n",
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+ i, val, twl4030_reg[i]);
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+ }
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+ }
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+ dev_dbg(codec->dev, "Found %d non maching registers. %s\n",
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+ difference, difference ? "Not OK" : "OK");
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+}
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- /* clear CODECPDZ prior to setting register defaults */
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- twl4030_codec_enable(codec, 0);
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+static inline void twl4030_reset_registers(struct snd_soc_codec *codec)
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+{
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+ int i;
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/* set all audio section registers to reasonable defaults */
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for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++)
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if (i != TWL4030_REG_APLL_CTL)
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- twl4030_write(codec, i, cache[i]);
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+ twl4030_write(codec, i, twl4030_reg[i]);
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}
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-static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
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+static void twl4030_init_chip(struct platform_device *pdev)
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{
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+ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
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+ struct twl4030_setup_data *setup = socdev->codec_data;
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+ struct snd_soc_codec *codec = socdev->card->codec;
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struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
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- int status = -1;
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+ u8 reg, byte;
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+ int i = 0;
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- if (enable) {
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- twl4030->apll_enabled++;
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- if (twl4030->apll_enabled == 1)
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- status = twl4030_codec_enable_resource(
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- TWL4030_CODEC_RES_APLL);
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- } else {
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- twl4030->apll_enabled--;
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- if (!twl4030->apll_enabled)
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- status = twl4030_codec_disable_resource(
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- TWL4030_CODEC_RES_APLL);
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- }
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+ /* Check defaults, if instructed before anything else */
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+ if (setup && setup->check_defaults)
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+ twl4030_check_defaults(codec);
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- if (status >= 0)
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- twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, status);
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-}
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+ /* Reset registers, if no setup data or if instructed to do so */
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+ if (!setup || (setup && setup->reset_registers))
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+ twl4030_reset_registers(codec);
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-static void twl4030_power_up(struct snd_soc_codec *codec)
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-{
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- struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
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- u8 anamicl, regmisc1, byte;
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- int i = 0;
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+ /* Refresh APLL_CTL register from HW */
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+ twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
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+ TWL4030_REG_APLL_CTL);
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+ twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, byte);
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- if (twl4030->codec_powered)
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+ /* anti-pop when changing analog gain */
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+ reg = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
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+ twl4030_write(codec, TWL4030_REG_MISC_SET_1,
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+ reg | TWL4030_SMOOTH_ANAVOL_EN);
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+
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+ twl4030_write(codec, TWL4030_REG_OPTION,
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+ TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
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+ TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
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+
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+ /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
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+ twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
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+
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+ /* Machine dependent setup */
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+ if (!setup)
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return;
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- /* set CODECPDZ to turn on codec */
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- twl4030_codec_enable(codec, 1);
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+ /* Configuration for headset ramp delay from setup data */
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+ if (setup->sysclk != twl4030->sysclk)
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+ dev_warn(codec->dev,
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+ "Mismatch in APLL mclk: %u (configured: %u)\n",
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+ setup->sysclk, twl4030->sysclk);
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+
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+ reg = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
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+ reg &= ~TWL4030_RAMP_DELAY;
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+ reg |= (setup->ramp_delay_value << 2);
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+ twl4030_write_reg_cache(codec, TWL4030_REG_HS_POPN_SET, reg);
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/* initiate offset cancellation */
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- anamicl = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
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+ twl4030_codec_enable(codec, 1);
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+
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+ reg = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
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+ reg &= ~TWL4030_OFFSET_CNCL_SEL;
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+ reg |= setup->offset_cncl_path;
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twl4030_write(codec, TWL4030_REG_ANAMICL,
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- anamicl | TWL4030_CNCL_OFFSET_START);
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+ reg | TWL4030_CNCL_OFFSET_START);
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/* wait for offset cancellation to complete */
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do {
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@@ -310,23 +345,28 @@ static void twl4030_power_up(struct snd_soc_codec *codec)
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/* Make sure that the reg_cache has the same value as the HW */
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twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
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- /* anti-pop when changing analog gain */
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- regmisc1 = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
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- twl4030_write(codec, TWL4030_REG_MISC_SET_1,
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- regmisc1 | TWL4030_SMOOTH_ANAVOL_EN);
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-
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- /* toggle CODECPDZ as per TRM */
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twl4030_codec_enable(codec, 0);
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- twl4030_codec_enable(codec, 1);
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}
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-/*
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- * Unconditional power down
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- */
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-static void twl4030_power_down(struct snd_soc_codec *codec)
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+static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
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{
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- /* power down */
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- twl4030_codec_enable(codec, 0);
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+ struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
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+ int status = -1;
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+
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+ if (enable) {
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+ twl4030->apll_enabled++;
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+ if (twl4030->apll_enabled == 1)
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+ status = twl4030_codec_enable_resource(
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+ TWL4030_CODEC_RES_APLL);
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+ } else {
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+ twl4030->apll_enabled--;
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+ if (!twl4030->apll_enabled)
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+ status = twl4030_codec_disable_resource(
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+ TWL4030_CODEC_RES_APLL);
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+ }
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+
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+ if (status >= 0)
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+ twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, status);
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}
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/* Earpiece */
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@@ -1605,10 +1645,10 @@ static int twl4030_set_bias_level(struct snd_soc_codec *codec,
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break;
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case SND_SOC_BIAS_STANDBY:
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if (codec->bias_level == SND_SOC_BIAS_OFF)
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- twl4030_power_up(codec);
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+ twl4030_codec_enable(codec, 1);
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break;
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case SND_SOC_BIAS_OFF:
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- twl4030_power_down(codec);
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+ twl4030_codec_enable(codec, 0);
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break;
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}
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codec->bias_level = level;
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@@ -1794,13 +1834,6 @@ static int twl4030_hw_params(struct snd_pcm_substream *substream,
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return -EINVAL;
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}
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- if (mode != old_mode) {
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- /* change rate and set CODECPDZ */
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- twl4030_codec_enable(codec, 0);
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- twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
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- twl4030_codec_enable(codec, 1);
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- }
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-
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/* sample size */
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old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
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format = old_format;
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@@ -1818,16 +1851,20 @@ static int twl4030_hw_params(struct snd_pcm_substream *substream,
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return -EINVAL;
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}
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- if (format != old_format) {
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-
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- /* clear CODECPDZ before changing format (codec requirement) */
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- twl4030_codec_enable(codec, 0);
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-
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- /* change format */
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- twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
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-
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- /* set CODECPDZ afterwards */
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- twl4030_codec_enable(codec, 1);
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+ if (format != old_format || mode != old_mode) {
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+ if (twl4030->codec_powered) {
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+ /*
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+ * If the codec is powered, than we need to toggle the
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+ * codec power.
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+ */
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+ twl4030_codec_enable(codec, 0);
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+ twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
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+ twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
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+ twl4030_codec_enable(codec, 1);
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+ } else {
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+ twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
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+ twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
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+ }
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}
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/* Store the important parameters for the DAI configuration and set
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@@ -1877,6 +1914,7 @@ static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
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unsigned int fmt)
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{
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struct snd_soc_codec *codec = codec_dai->codec;
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+ struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
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u8 old_format, format;
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/* get format */
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@@ -1911,15 +1949,17 @@ static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
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}
|
|
|
|
|
|
if (format != old_format) {
|
|
|
-
|
|
|
- /* clear CODECPDZ before changing format (codec requirement) */
|
|
|
- twl4030_codec_enable(codec, 0);
|
|
|
-
|
|
|
- /* change format */
|
|
|
- twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
|
|
|
-
|
|
|
- /* set CODECPDZ afterwards */
|
|
|
- twl4030_codec_enable(codec, 1);
|
|
|
+ if (twl4030->codec_powered) {
|
|
|
+ /*
|
|
|
+ * If the codec is powered, than we need to toggle the
|
|
|
+ * codec power.
|
|
|
+ */
|
|
|
+ twl4030_codec_enable(codec, 0);
|
|
|
+ twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
|
|
|
+ twl4030_codec_enable(codec, 1);
|
|
|
+ } else {
|
|
|
+ twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
|
|
|
+ }
|
|
|
}
|
|
|
|
|
|
return 0;
|
|
@@ -2011,6 +2051,7 @@ static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
|
|
|
struct snd_soc_pcm_runtime *rtd = substream->private_data;
|
|
|
struct snd_soc_device *socdev = rtd->socdev;
|
|
|
struct snd_soc_codec *codec = socdev->card->codec;
|
|
|
+ struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
|
|
|
u8 old_mode, mode;
|
|
|
|
|
|
/* Enable voice digital filters */
|
|
@@ -2035,10 +2076,17 @@ static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
|
|
|
}
|
|
|
|
|
|
if (mode != old_mode) {
|
|
|
- /* change rate and set CODECPDZ */
|
|
|
- twl4030_codec_enable(codec, 0);
|
|
|
- twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
|
|
|
- twl4030_codec_enable(codec, 1);
|
|
|
+ if (twl4030->codec_powered) {
|
|
|
+ /*
|
|
|
+ * If the codec is powered, than we need to toggle the
|
|
|
+ * codec power.
|
|
|
+ */
|
|
|
+ twl4030_codec_enable(codec, 0);
|
|
|
+ twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
|
|
|
+ twl4030_codec_enable(codec, 1);
|
|
|
+ } else {
|
|
|
+ twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
|
|
|
+ }
|
|
|
}
|
|
|
|
|
|
return 0;
|
|
@@ -2068,6 +2116,7 @@ static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
|
|
|
unsigned int fmt)
|
|
|
{
|
|
|
struct snd_soc_codec *codec = codec_dai->codec;
|
|
|
+ struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
|
|
|
u8 old_format, format;
|
|
|
|
|
|
/* get format */
|
|
@@ -2099,10 +2148,17 @@ static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
|
|
|
}
|
|
|
|
|
|
if (format != old_format) {
|
|
|
- /* change format and set CODECPDZ */
|
|
|
- twl4030_codec_enable(codec, 0);
|
|
|
- twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
|
|
|
- twl4030_codec_enable(codec, 1);
|
|
|
+ if (twl4030->codec_powered) {
|
|
|
+ /*
|
|
|
+ * If the codec is powered, than we need to toggle the
|
|
|
+ * codec power.
|
|
|
+ */
|
|
|
+ twl4030_codec_enable(codec, 0);
|
|
|
+ twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
|
|
|
+ twl4030_codec_enable(codec, 1);
|
|
|
+ } else {
|
|
|
+ twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
|
|
|
+ }
|
|
|
}
|
|
|
|
|
|
return 0;
|
|
@@ -2202,31 +2258,15 @@ static struct snd_soc_codec *twl4030_codec;
|
|
|
static int twl4030_soc_probe(struct platform_device *pdev)
|
|
|
{
|
|
|
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
|
|
|
- struct twl4030_setup_data *setup = socdev->codec_data;
|
|
|
struct snd_soc_codec *codec;
|
|
|
- struct twl4030_priv *twl4030;
|
|
|
int ret;
|
|
|
|
|
|
BUG_ON(!twl4030_codec);
|
|
|
|
|
|
codec = twl4030_codec;
|
|
|
- twl4030 = snd_soc_codec_get_drvdata(codec);
|
|
|
socdev->card->codec = codec;
|
|
|
|
|
|
- /* Configuration for headset ramp delay from setup data */
|
|
|
- if (setup) {
|
|
|
- unsigned char hs_pop;
|
|
|
-
|
|
|
- if (setup->sysclk != twl4030->sysclk)
|
|
|
- dev_warn(&pdev->dev,
|
|
|
- "Mismatch in APLL mclk: %u (configured: %u)\n",
|
|
|
- setup->sysclk, twl4030->sysclk);
|
|
|
-
|
|
|
- hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
|
|
|
- hs_pop &= ~TWL4030_RAMP_DELAY;
|
|
|
- hs_pop |= (setup->ramp_delay_value << 2);
|
|
|
- twl4030_write_reg_cache(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
|
|
|
- }
|
|
|
+ twl4030_init_chip(pdev);
|
|
|
|
|
|
/* register pcms */
|
|
|
ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
|
|
@@ -2247,6 +2287,8 @@ static int twl4030_soc_remove(struct platform_device *pdev)
|
|
|
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
|
|
|
struct snd_soc_codec *codec = socdev->card->codec;
|
|
|
|
|
|
+ /* Reset registers to their chip default before leaving */
|
|
|
+ twl4030_reset_registers(codec);
|
|
|
twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
|
|
|
snd_soc_free_pcms(socdev);
|
|
|
snd_soc_dapm_free(socdev);
|
|
@@ -2287,6 +2329,7 @@ static int __devinit twl4030_codec_probe(struct platform_device *pdev)
|
|
|
codec->read = twl4030_read_reg_cache;
|
|
|
codec->write = twl4030_write;
|
|
|
codec->set_bias_level = twl4030_set_bias_level;
|
|
|
+ codec->idle_bias_off = 1;
|
|
|
codec->dai = twl4030_dai;
|
|
|
codec->num_dai = ARRAY_SIZE(twl4030_dai);
|
|
|
codec->reg_cache_size = sizeof(twl4030_reg);
|
|
@@ -2302,9 +2345,7 @@ static int __devinit twl4030_codec_probe(struct platform_device *pdev)
|
|
|
|
|
|
/* Set the defaults, and power up the codec */
|
|
|
twl4030->sysclk = twl4030_codec_get_mclk() / 1000;
|
|
|
- twl4030_init_chip(codec);
|
|
|
codec->bias_level = SND_SOC_BIAS_OFF;
|
|
|
- twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
|
|
|
|
|
ret = snd_soc_register_codec(codec);
|
|
|
if (ret != 0) {
|
|
@@ -2322,7 +2363,7 @@ static int __devinit twl4030_codec_probe(struct platform_device *pdev)
|
|
|
return 0;
|
|
|
|
|
|
error_codec:
|
|
|
- twl4030_power_down(codec);
|
|
|
+ twl4030_codec_enable(codec, 0);
|
|
|
kfree(codec->reg_cache);
|
|
|
error_cache:
|
|
|
kfree(twl4030);
|