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@@ -0,0 +1,796 @@
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+/*
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+ * Intel CPU microcode early update for Linux
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+ *
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+ * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
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+ * H Peter Anvin" <hpa@zytor.com>
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+ *
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+ * This allows to early upgrade microcode on Intel processors
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+ * belonging to IA-32 family - PentiumPro, Pentium II,
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+ * Pentium III, Xeon, Pentium 4, etc.
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+ *
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+ * Reference: Section 9.11 of Volume 3, IA-32 Intel Architecture
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+ * Software Developer's Manual.
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License
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+ * as published by the Free Software Foundation; either version
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+ * 2 of the License, or (at your option) any later version.
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+ */
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+#include <linux/module.h>
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+#include <linux/mm.h>
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+#include <linux/slab.h>
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+#include <linux/earlycpio.h>
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+#include <linux/initrd.h>
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+#include <linux/cpu.h>
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+#include <asm/msr.h>
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+#include <asm/microcode_intel.h>
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+#include <asm/processor.h>
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+#include <asm/tlbflush.h>
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+#include <asm/setup.h>
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+
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+unsigned long mc_saved_in_initrd[MAX_UCODE_COUNT];
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+struct mc_saved_data {
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+ unsigned int mc_saved_count;
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+ struct microcode_intel **mc_saved;
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+} mc_saved_data;
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+
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+static enum ucode_state __cpuinit
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+generic_load_microcode_early(struct microcode_intel **mc_saved_p,
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+ unsigned int mc_saved_count,
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+ struct ucode_cpu_info *uci)
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+{
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+ struct microcode_intel *ucode_ptr, *new_mc = NULL;
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+ int new_rev = uci->cpu_sig.rev;
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+ enum ucode_state state = UCODE_OK;
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+ unsigned int mc_size;
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+ struct microcode_header_intel *mc_header;
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+ unsigned int csig = uci->cpu_sig.sig;
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+ unsigned int cpf = uci->cpu_sig.pf;
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+ int i;
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+
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+ for (i = 0; i < mc_saved_count; i++) {
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+ ucode_ptr = mc_saved_p[i];
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+
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+ mc_header = (struct microcode_header_intel *)ucode_ptr;
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+ mc_size = get_totalsize(mc_header);
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+ if (get_matching_microcode(csig, cpf, ucode_ptr, new_rev)) {
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+ new_rev = mc_header->rev;
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+ new_mc = ucode_ptr;
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+ }
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+ }
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+
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+ if (!new_mc) {
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+ state = UCODE_NFOUND;
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+ goto out;
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+ }
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+
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+ uci->mc = (struct microcode_intel *)new_mc;
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+out:
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+ return state;
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+}
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+
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+static void __cpuinit
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+microcode_pointer(struct microcode_intel **mc_saved,
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+ unsigned long *mc_saved_in_initrd,
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+ unsigned long initrd_start, int mc_saved_count)
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+{
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+ int i;
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+
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+ for (i = 0; i < mc_saved_count; i++)
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+ mc_saved[i] = (struct microcode_intel *)
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+ (mc_saved_in_initrd[i] + initrd_start);
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+}
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+
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+#ifdef CONFIG_X86_32
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+static void __cpuinit
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+microcode_phys(struct microcode_intel **mc_saved_tmp,
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+ struct mc_saved_data *mc_saved_data)
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+{
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+ int i;
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+ struct microcode_intel ***mc_saved;
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+
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+ mc_saved = (struct microcode_intel ***)
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+ __pa_symbol(&mc_saved_data->mc_saved);
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+ for (i = 0; i < mc_saved_data->mc_saved_count; i++) {
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+ struct microcode_intel *p;
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+
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+ p = *(struct microcode_intel **)
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+ __pa(mc_saved_data->mc_saved + i);
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+ mc_saved_tmp[i] = (struct microcode_intel *)__pa(p);
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+ }
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+}
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+#endif
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+
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+static enum ucode_state __cpuinit
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+load_microcode(struct mc_saved_data *mc_saved_data,
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+ unsigned long *mc_saved_in_initrd,
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+ unsigned long initrd_start,
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+ struct ucode_cpu_info *uci)
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+{
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+ struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
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+ unsigned int count = mc_saved_data->mc_saved_count;
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+
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+ if (!mc_saved_data->mc_saved) {
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+ microcode_pointer(mc_saved_tmp, mc_saved_in_initrd,
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+ initrd_start, count);
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+
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+ return generic_load_microcode_early(mc_saved_tmp, count, uci);
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+ } else {
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+#ifdef CONFIG_X86_32
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+ microcode_phys(mc_saved_tmp, mc_saved_data);
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+ return generic_load_microcode_early(mc_saved_tmp, count, uci);
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+#else
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+ return generic_load_microcode_early(mc_saved_data->mc_saved,
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+ count, uci);
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+#endif
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+ }
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+}
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+
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+static u8 get_x86_family(unsigned long sig)
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+{
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+ u8 x86;
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+
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+ x86 = (sig >> 8) & 0xf;
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+
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+ if (x86 == 0xf)
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+ x86 += (sig >> 20) & 0xff;
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+
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+ return x86;
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+}
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+
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+static u8 get_x86_model(unsigned long sig)
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+{
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+ u8 x86, x86_model;
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+
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+ x86 = get_x86_family(sig);
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+ x86_model = (sig >> 4) & 0xf;
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+
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+ if (x86 == 0x6 || x86 == 0xf)
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+ x86_model += ((sig >> 16) & 0xf) << 4;
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+
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+ return x86_model;
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+}
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+
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+/*
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+ * Given CPU signature and a microcode patch, this function finds if the
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+ * microcode patch has matching family and model with the CPU.
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+ */
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+static enum ucode_state
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+matching_model_microcode(struct microcode_header_intel *mc_header,
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+ unsigned long sig)
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+{
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+ u8 x86, x86_model;
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+ u8 x86_ucode, x86_model_ucode;
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+ struct extended_sigtable *ext_header;
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+ unsigned long total_size = get_totalsize(mc_header);
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+ unsigned long data_size = get_datasize(mc_header);
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+ int ext_sigcount, i;
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+ struct extended_signature *ext_sig;
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+
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+ x86 = get_x86_family(sig);
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+ x86_model = get_x86_model(sig);
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+
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+ x86_ucode = get_x86_family(mc_header->sig);
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+ x86_model_ucode = get_x86_model(mc_header->sig);
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+
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+ if (x86 == x86_ucode && x86_model == x86_model_ucode)
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+ return UCODE_OK;
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+
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+ /* Look for ext. headers: */
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+ if (total_size <= data_size + MC_HEADER_SIZE)
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+ return UCODE_NFOUND;
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+
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+ ext_header = (struct extended_sigtable *)
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+ mc_header + data_size + MC_HEADER_SIZE;
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+ ext_sigcount = ext_header->count;
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+ ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
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+
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+ for (i = 0; i < ext_sigcount; i++) {
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+ x86_ucode = get_x86_family(ext_sig->sig);
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+ x86_model_ucode = get_x86_model(ext_sig->sig);
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+
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+ if (x86 == x86_ucode && x86_model == x86_model_ucode)
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+ return UCODE_OK;
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+
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+ ext_sig++;
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+ }
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+
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+ return UCODE_NFOUND;
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+}
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+
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+static int
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+save_microcode(struct mc_saved_data *mc_saved_data,
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+ struct microcode_intel **mc_saved_src,
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+ unsigned int mc_saved_count)
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+{
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+ int i, j;
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+ struct microcode_intel **mc_saved_p;
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+ int ret;
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+
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+ if (!mc_saved_count)
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+ return -EINVAL;
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+
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+ /*
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+ * Copy new microcode data.
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+ */
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+ mc_saved_p = kmalloc(mc_saved_count*sizeof(struct microcode_intel *),
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+ GFP_KERNEL);
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+ if (!mc_saved_p)
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+ return -ENOMEM;
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+
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+ for (i = 0; i < mc_saved_count; i++) {
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+ struct microcode_intel *mc = mc_saved_src[i];
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+ struct microcode_header_intel *mc_header = &mc->hdr;
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+ unsigned long mc_size = get_totalsize(mc_header);
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+ mc_saved_p[i] = kmalloc(mc_size, GFP_KERNEL);
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+ if (!mc_saved_p[i]) {
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+ ret = -ENOMEM;
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+ goto err;
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+ }
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+ if (!mc_saved_src[i]) {
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+ ret = -EINVAL;
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+ goto err;
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+ }
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+ memcpy(mc_saved_p[i], mc, mc_size);
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+ }
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+
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+ /*
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+ * Point to newly saved microcode.
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+ */
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+ mc_saved_data->mc_saved = mc_saved_p;
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+ mc_saved_data->mc_saved_count = mc_saved_count;
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+
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+ return 0;
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+
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+err:
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+ for (j = 0; j <= i; j++)
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+ kfree(mc_saved_p[j]);
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+ kfree(mc_saved_p);
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+
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+ return ret;
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+}
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+
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+/*
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+ * A microcode patch in ucode_ptr is saved into mc_saved
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+ * - if it has matching signature and newer revision compared to an existing
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+ * patch mc_saved.
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+ * - or if it is a newly discovered microcode patch.
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+ *
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+ * The microcode patch should have matching model with CPU.
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+ */
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+static void _save_mc(struct microcode_intel **mc_saved, u8 *ucode_ptr,
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+ unsigned int *mc_saved_count_p)
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+{
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+ int i;
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+ int found = 0;
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+ unsigned int mc_saved_count = *mc_saved_count_p;
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+ struct microcode_header_intel *mc_header;
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+
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+ mc_header = (struct microcode_header_intel *)ucode_ptr;
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+ for (i = 0; i < mc_saved_count; i++) {
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+ unsigned int sig, pf;
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+ unsigned int new_rev;
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+ struct microcode_header_intel *mc_saved_header =
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+ (struct microcode_header_intel *)mc_saved[i];
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+ sig = mc_saved_header->sig;
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+ pf = mc_saved_header->pf;
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+ new_rev = mc_header->rev;
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+
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+ if (get_matching_sig(sig, pf, ucode_ptr, new_rev)) {
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+ found = 1;
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+ if (update_match_revision(mc_header, new_rev)) {
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+ /*
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+ * Found an older ucode saved before.
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+ * Replace the older one with this newer
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+ * one.
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+ */
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+ mc_saved[i] =
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+ (struct microcode_intel *)ucode_ptr;
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+ break;
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+ }
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+ }
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+ }
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+ if (i >= mc_saved_count && !found)
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+ /*
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+ * This ucode is first time discovered in ucode file.
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+ * Save it to memory.
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+ */
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+ mc_saved[mc_saved_count++] =
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+ (struct microcode_intel *)ucode_ptr;
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+
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+ *mc_saved_count_p = mc_saved_count;
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+}
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+
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+/*
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+ * Get microcode matching with BSP's model. Only CPUs with the same model as
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+ * BSP can stay in the platform.
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+ */
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+static enum ucode_state __init
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+get_matching_model_microcode(int cpu, unsigned long start,
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+ void *data, size_t size,
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+ struct mc_saved_data *mc_saved_data,
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+ unsigned long *mc_saved_in_initrd,
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+ struct ucode_cpu_info *uci)
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+{
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+ u8 *ucode_ptr = data;
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+ unsigned int leftover = size;
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+ enum ucode_state state = UCODE_OK;
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+ unsigned int mc_size;
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+ struct microcode_header_intel *mc_header;
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+ struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
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+ unsigned int mc_saved_count = mc_saved_data->mc_saved_count;
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+ int i;
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+
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+ while (leftover) {
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+ mc_header = (struct microcode_header_intel *)ucode_ptr;
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+
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+ mc_size = get_totalsize(mc_header);
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+ if (!mc_size || mc_size > leftover ||
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+ microcode_sanity_check(ucode_ptr, 0) < 0)
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+ break;
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+
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+ leftover -= mc_size;
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+
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+ /*
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+ * Since APs with same family and model as the BSP may boot in
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+ * the platform, we need to find and save microcode patches
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+ * with the same family and model as the BSP.
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+ */
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+ if (matching_model_microcode(mc_header, uci->cpu_sig.sig) !=
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+ UCODE_OK) {
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+ ucode_ptr += mc_size;
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+ continue;
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+ }
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+
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+ _save_mc(mc_saved_tmp, ucode_ptr, &mc_saved_count);
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+
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+ ucode_ptr += mc_size;
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+ }
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+
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+ if (leftover) {
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+ state = UCODE_ERROR;
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+ goto out;
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+ }
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+
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+ if (mc_saved_count == 0) {
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+ state = UCODE_NFOUND;
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+ goto out;
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+ }
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+
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+ for (i = 0; i < mc_saved_count; i++)
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+ mc_saved_in_initrd[i] = (unsigned long)mc_saved_tmp[i] - start;
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+
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+ mc_saved_data->mc_saved_count = mc_saved_count;
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+out:
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+ return state;
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+}
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+
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+#define native_rdmsr(msr, val1, val2) \
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+do { \
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+ u64 __val = native_read_msr((msr)); \
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+ (void)((val1) = (u32)__val); \
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+ (void)((val2) = (u32)(__val >> 32)); \
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+} while (0)
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+
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+#define native_wrmsr(msr, low, high) \
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+ native_write_msr(msr, low, high);
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+
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+static int __cpuinit collect_cpu_info_early(struct ucode_cpu_info *uci)
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+{
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+ unsigned int val[2];
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+ u8 x86, x86_model;
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+ struct cpu_signature csig;
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+ unsigned int eax, ebx, ecx, edx;
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+
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+ csig.sig = 0;
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+ csig.pf = 0;
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+ csig.rev = 0;
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+
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+ memset(uci, 0, sizeof(*uci));
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+
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+ eax = 0x00000001;
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+ ecx = 0;
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+ native_cpuid(&eax, &ebx, &ecx, &edx);
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+ csig.sig = eax;
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+
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+ x86 = get_x86_family(csig.sig);
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+ x86_model = get_x86_model(csig.sig);
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+
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+ if ((x86_model >= 5) || (x86 > 6)) {
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+ /* get processor flags from MSR 0x17 */
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+ native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
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+ csig.pf = 1 << ((val[1] >> 18) & 7);
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|
|
+ }
|
|
|
+ native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
|
|
|
+
|
|
|
+ /* As documented in the SDM: Do a CPUID 1 here */
|
|
|
+ sync_core();
|
|
|
+
|
|
|
+ /* get the current revision from MSR 0x8B */
|
|
|
+ native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
|
|
|
+
|
|
|
+ csig.rev = val[1];
|
|
|
+
|
|
|
+ uci->cpu_sig = csig;
|
|
|
+ uci->valid = 1;
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+#ifdef DEBUG
|
|
|
+static void __ref show_saved_mc(void)
|
|
|
+{
|
|
|
+ int i, j;
|
|
|
+ unsigned int sig, pf, rev, total_size, data_size, date;
|
|
|
+ struct ucode_cpu_info uci;
|
|
|
+
|
|
|
+ if (mc_saved_data.mc_saved_count == 0) {
|
|
|
+ pr_debug("no micorcode data saved.\n");
|
|
|
+ return;
|
|
|
+ }
|
|
|
+ pr_debug("Total microcode saved: %d\n", mc_saved_data.mc_saved_count);
|
|
|
+
|
|
|
+ collect_cpu_info_early(&uci);
|
|
|
+
|
|
|
+ sig = uci.cpu_sig.sig;
|
|
|
+ pf = uci.cpu_sig.pf;
|
|
|
+ rev = uci.cpu_sig.rev;
|
|
|
+ pr_debug("CPU%d: sig=0x%x, pf=0x%x, rev=0x%x\n",
|
|
|
+ smp_processor_id(), sig, pf, rev);
|
|
|
+
|
|
|
+ for (i = 0; i < mc_saved_data.mc_saved_count; i++) {
|
|
|
+ struct microcode_header_intel *mc_saved_header;
|
|
|
+ struct extended_sigtable *ext_header;
|
|
|
+ int ext_sigcount;
|
|
|
+ struct extended_signature *ext_sig;
|
|
|
+
|
|
|
+ mc_saved_header = (struct microcode_header_intel *)
|
|
|
+ mc_saved_data.mc_saved[i];
|
|
|
+ sig = mc_saved_header->sig;
|
|
|
+ pf = mc_saved_header->pf;
|
|
|
+ rev = mc_saved_header->rev;
|
|
|
+ total_size = get_totalsize(mc_saved_header);
|
|
|
+ data_size = get_datasize(mc_saved_header);
|
|
|
+ date = mc_saved_header->date;
|
|
|
+
|
|
|
+ pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, toal size=0x%x, date = %04x-%02x-%02x\n",
|
|
|
+ i, sig, pf, rev, total_size,
|
|
|
+ date & 0xffff,
|
|
|
+ date >> 24,
|
|
|
+ (date >> 16) & 0xff);
|
|
|
+
|
|
|
+ /* Look for ext. headers: */
|
|
|
+ if (total_size <= data_size + MC_HEADER_SIZE)
|
|
|
+ continue;
|
|
|
+
|
|
|
+ ext_header = (struct extended_sigtable *)
|
|
|
+ mc_saved_header + data_size + MC_HEADER_SIZE;
|
|
|
+ ext_sigcount = ext_header->count;
|
|
|
+ ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
|
|
|
+
|
|
|
+ for (j = 0; j < ext_sigcount; j++) {
|
|
|
+ sig = ext_sig->sig;
|
|
|
+ pf = ext_sig->pf;
|
|
|
+
|
|
|
+ pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
|
|
|
+ j, sig, pf);
|
|
|
+
|
|
|
+ ext_sig++;
|
|
|
+ }
|
|
|
+
|
|
|
+ }
|
|
|
+}
|
|
|
+#else
|
|
|
+static inline void show_saved_mc(void)
|
|
|
+{
|
|
|
+}
|
|
|
+#endif
|
|
|
+
|
|
|
+#if defined(CONFIG_MICROCODE_INTEL_EARLY) && defined(CONFIG_HOTPLUG_CPU)
|
|
|
+/*
|
|
|
+ * Save this mc into mc_saved_data. So it will be loaded early when a CPU is
|
|
|
+ * hot added or resumes.
|
|
|
+ *
|
|
|
+ * Please make sure this mc should be a valid microcode patch before calling
|
|
|
+ * this function.
|
|
|
+ */
|
|
|
+int save_mc_for_early(u8 *mc)
|
|
|
+{
|
|
|
+ struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
|
|
|
+ unsigned int mc_saved_count_init;
|
|
|
+ unsigned int mc_saved_count;
|
|
|
+ struct microcode_intel **mc_saved;
|
|
|
+ int ret = 0;
|
|
|
+ int i;
|
|
|
+
|
|
|
+ /*
|
|
|
+ * Hold hotplug lock so mc_saved_data is not accessed by a CPU in
|
|
|
+ * hotplug.
|
|
|
+ */
|
|
|
+ cpu_hotplug_driver_lock();
|
|
|
+
|
|
|
+ mc_saved_count_init = mc_saved_data.mc_saved_count;
|
|
|
+ mc_saved_count = mc_saved_data.mc_saved_count;
|
|
|
+ mc_saved = mc_saved_data.mc_saved;
|
|
|
+
|
|
|
+ if (mc_saved && mc_saved_count)
|
|
|
+ memcpy(mc_saved_tmp, mc_saved,
|
|
|
+ mc_saved_count * sizeof(struct mirocode_intel *));
|
|
|
+ /*
|
|
|
+ * Save the microcode patch mc in mc_save_tmp structure if it's a newer
|
|
|
+ * version.
|
|
|
+ */
|
|
|
+
|
|
|
+ _save_mc(mc_saved_tmp, mc, &mc_saved_count);
|
|
|
+
|
|
|
+ /*
|
|
|
+ * Save the mc_save_tmp in global mc_saved_data.
|
|
|
+ */
|
|
|
+ ret = save_microcode(&mc_saved_data, mc_saved_tmp, mc_saved_count);
|
|
|
+ if (ret) {
|
|
|
+ pr_err("Can not save microcode patch.\n");
|
|
|
+ goto out;
|
|
|
+ }
|
|
|
+
|
|
|
+ show_saved_mc();
|
|
|
+
|
|
|
+ /*
|
|
|
+ * Free old saved microcod data.
|
|
|
+ */
|
|
|
+ if (mc_saved) {
|
|
|
+ for (i = 0; i < mc_saved_count_init; i++)
|
|
|
+ kfree(mc_saved[i]);
|
|
|
+ kfree(mc_saved);
|
|
|
+ }
|
|
|
+
|
|
|
+out:
|
|
|
+ cpu_hotplug_driver_unlock();
|
|
|
+
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+EXPORT_SYMBOL_GPL(save_mc_for_early);
|
|
|
+#endif
|
|
|
+
|
|
|
+static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin";
|
|
|
+static __init enum ucode_state
|
|
|
+scan_microcode(unsigned long start, unsigned long end,
|
|
|
+ struct mc_saved_data *mc_saved_data,
|
|
|
+ unsigned long *mc_saved_in_initrd,
|
|
|
+ struct ucode_cpu_info *uci)
|
|
|
+{
|
|
|
+ unsigned int size = end - start + 1;
|
|
|
+ struct cpio_data cd;
|
|
|
+ long offset = 0;
|
|
|
+#ifdef CONFIG_X86_32
|
|
|
+ char *p = (char *)__pa_symbol(ucode_name);
|
|
|
+#else
|
|
|
+ char *p = ucode_name;
|
|
|
+#endif
|
|
|
+
|
|
|
+ cd.data = NULL;
|
|
|
+ cd.size = 0;
|
|
|
+
|
|
|
+ cd = find_cpio_data(p, (void *)start, size, &offset);
|
|
|
+ if (!cd.data)
|
|
|
+ return UCODE_ERROR;
|
|
|
+
|
|
|
+
|
|
|
+ return get_matching_model_microcode(0, start, cd.data, cd.size,
|
|
|
+ mc_saved_data, mc_saved_in_initrd,
|
|
|
+ uci);
|
|
|
+}
|
|
|
+
|
|
|
+/*
|
|
|
+ * Print ucode update info.
|
|
|
+ */
|
|
|
+static void __cpuinit
|
|
|
+print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
|
|
|
+{
|
|
|
+ int cpu = smp_processor_id();
|
|
|
+
|
|
|
+ pr_info("CPU%d microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
|
|
|
+ cpu,
|
|
|
+ uci->cpu_sig.rev,
|
|
|
+ date & 0xffff,
|
|
|
+ date >> 24,
|
|
|
+ (date >> 16) & 0xff);
|
|
|
+}
|
|
|
+
|
|
|
+#ifdef CONFIG_X86_32
|
|
|
+
|
|
|
+static int delay_ucode_info;
|
|
|
+static int current_mc_date;
|
|
|
+
|
|
|
+/*
|
|
|
+ * Print early updated ucode info after printk works. This is delayed info dump.
|
|
|
+ */
|
|
|
+void __cpuinit show_ucode_info_early(void)
|
|
|
+{
|
|
|
+ struct ucode_cpu_info uci;
|
|
|
+
|
|
|
+ if (delay_ucode_info) {
|
|
|
+ collect_cpu_info_early(&uci);
|
|
|
+ print_ucode_info(&uci, current_mc_date);
|
|
|
+ delay_ucode_info = 0;
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+/*
|
|
|
+ * At this point, we can not call printk() yet. Keep microcode patch number in
|
|
|
+ * mc_saved_data.mc_saved and delay printing microcode info in
|
|
|
+ * show_ucode_info_early() until printk() works.
|
|
|
+ */
|
|
|
+static void __cpuinit print_ucode(struct ucode_cpu_info *uci)
|
|
|
+{
|
|
|
+ struct microcode_intel *mc_intel;
|
|
|
+ int *delay_ucode_info_p;
|
|
|
+ int *current_mc_date_p;
|
|
|
+
|
|
|
+ mc_intel = uci->mc;
|
|
|
+ if (mc_intel == NULL)
|
|
|
+ return;
|
|
|
+
|
|
|
+ delay_ucode_info_p = (int *)__pa_symbol(&delay_ucode_info);
|
|
|
+ current_mc_date_p = (int *)__pa_symbol(¤t_mc_date);
|
|
|
+
|
|
|
+ *delay_ucode_info_p = 1;
|
|
|
+ *current_mc_date_p = mc_intel->hdr.date;
|
|
|
+}
|
|
|
+#else
|
|
|
+
|
|
|
+/*
|
|
|
+ * Flush global tlb. We only do this in x86_64 where paging has been enabled
|
|
|
+ * already and PGE should be enabled as well.
|
|
|
+ */
|
|
|
+static inline void __cpuinit flush_tlb_early(void)
|
|
|
+{
|
|
|
+ __native_flush_tlb_global_irq_disabled();
|
|
|
+}
|
|
|
+
|
|
|
+static inline void __cpuinit print_ucode(struct ucode_cpu_info *uci)
|
|
|
+{
|
|
|
+ struct microcode_intel *mc_intel;
|
|
|
+
|
|
|
+ mc_intel = uci->mc;
|
|
|
+ if (mc_intel == NULL)
|
|
|
+ return;
|
|
|
+
|
|
|
+ print_ucode_info(uci, mc_intel->hdr.date);
|
|
|
+}
|
|
|
+#endif
|
|
|
+
|
|
|
+static int apply_microcode_early(struct mc_saved_data *mc_saved_data,
|
|
|
+ struct ucode_cpu_info *uci)
|
|
|
+{
|
|
|
+ struct microcode_intel *mc_intel;
|
|
|
+ unsigned int val[2];
|
|
|
+
|
|
|
+ mc_intel = uci->mc;
|
|
|
+ if (mc_intel == NULL)
|
|
|
+ return 0;
|
|
|
+
|
|
|
+ /* write microcode via MSR 0x79 */
|
|
|
+ native_wrmsr(MSR_IA32_UCODE_WRITE,
|
|
|
+ (unsigned long) mc_intel->bits,
|
|
|
+ (unsigned long) mc_intel->bits >> 16 >> 16);
|
|
|
+ native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
|
|
|
+
|
|
|
+ /* As documented in the SDM: Do a CPUID 1 here */
|
|
|
+ sync_core();
|
|
|
+
|
|
|
+ /* get the current revision from MSR 0x8B */
|
|
|
+ native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
|
|
|
+ if (val[1] != mc_intel->hdr.rev)
|
|
|
+ return -1;
|
|
|
+
|
|
|
+#ifdef CONFIG_X86_64
|
|
|
+ /* Flush global tlb. This is precaution. */
|
|
|
+ flush_tlb_early();
|
|
|
+#endif
|
|
|
+ uci->cpu_sig.rev = val[1];
|
|
|
+
|
|
|
+ print_ucode(uci);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+/*
|
|
|
+ * This function converts microcode patch offsets previously stored in
|
|
|
+ * mc_saved_in_initrd to pointers and stores the pointers in mc_saved_data.
|
|
|
+ */
|
|
|
+int __init save_microcode_in_initrd(void)
|
|
|
+{
|
|
|
+ unsigned int count = mc_saved_data.mc_saved_count;
|
|
|
+ struct microcode_intel *mc_saved[MAX_UCODE_COUNT];
|
|
|
+ int ret = 0;
|
|
|
+
|
|
|
+ if (count == 0)
|
|
|
+ return ret;
|
|
|
+
|
|
|
+ microcode_pointer(mc_saved, mc_saved_in_initrd, initrd_start, count);
|
|
|
+ ret = save_microcode(&mc_saved_data, mc_saved, count);
|
|
|
+ if (ret)
|
|
|
+ pr_err("Can not save microcod patches from initrd");
|
|
|
+
|
|
|
+ show_saved_mc();
|
|
|
+
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+static void __init
|
|
|
+_load_ucode_intel_bsp(struct mc_saved_data *mc_saved_data,
|
|
|
+ unsigned long *mc_saved_in_initrd,
|
|
|
+ unsigned long initrd_start_early,
|
|
|
+ unsigned long initrd_end_early,
|
|
|
+ struct ucode_cpu_info *uci)
|
|
|
+{
|
|
|
+ collect_cpu_info_early(uci);
|
|
|
+ scan_microcode(initrd_start_early, initrd_end_early, mc_saved_data,
|
|
|
+ mc_saved_in_initrd, uci);
|
|
|
+ load_microcode(mc_saved_data, mc_saved_in_initrd,
|
|
|
+ initrd_start_early, uci);
|
|
|
+ apply_microcode_early(mc_saved_data, uci);
|
|
|
+}
|
|
|
+
|
|
|
+void __init
|
|
|
+load_ucode_intel_bsp(void)
|
|
|
+{
|
|
|
+ u64 ramdisk_image, ramdisk_size;
|
|
|
+ unsigned long initrd_start_early, initrd_end_early;
|
|
|
+ struct ucode_cpu_info uci;
|
|
|
+#ifdef CONFIG_X86_32
|
|
|
+ struct boot_params *boot_params_p;
|
|
|
+
|
|
|
+ boot_params_p = (struct boot_params *)__pa_symbol(&boot_params);
|
|
|
+ ramdisk_image = boot_params_p->hdr.ramdisk_image;
|
|
|
+ ramdisk_size = boot_params_p->hdr.ramdisk_size;
|
|
|
+ initrd_start_early = ramdisk_image;
|
|
|
+ initrd_end_early = initrd_start_early + ramdisk_size;
|
|
|
+
|
|
|
+ _load_ucode_intel_bsp(
|
|
|
+ (struct mc_saved_data *)__pa_symbol(&mc_saved_data),
|
|
|
+ (unsigned long *)__pa_symbol(&mc_saved_in_initrd),
|
|
|
+ initrd_start_early, initrd_end_early, &uci);
|
|
|
+#else
|
|
|
+ ramdisk_image = boot_params.hdr.ramdisk_image;
|
|
|
+ ramdisk_size = boot_params.hdr.ramdisk_size;
|
|
|
+ initrd_start_early = ramdisk_image + PAGE_OFFSET;
|
|
|
+ initrd_end_early = initrd_start_early + ramdisk_size;
|
|
|
+
|
|
|
+ _load_ucode_intel_bsp(&mc_saved_data, mc_saved_in_initrd,
|
|
|
+ initrd_start_early, initrd_end_early, &uci);
|
|
|
+#endif
|
|
|
+}
|
|
|
+
|
|
|
+void __cpuinit load_ucode_intel_ap(void)
|
|
|
+{
|
|
|
+ struct mc_saved_data *mc_saved_data_p;
|
|
|
+ struct ucode_cpu_info uci;
|
|
|
+ unsigned long *mc_saved_in_initrd_p;
|
|
|
+ unsigned long initrd_start_addr;
|
|
|
+#ifdef CONFIG_X86_32
|
|
|
+ unsigned long *initrd_start_p;
|
|
|
+
|
|
|
+ mc_saved_in_initrd_p =
|
|
|
+ (unsigned long *)__pa_symbol(mc_saved_in_initrd);
|
|
|
+ mc_saved_data_p = (struct mc_saved_data *)__pa_symbol(&mc_saved_data);
|
|
|
+ initrd_start_p = (unsigned long *)__pa_symbol(&initrd_start);
|
|
|
+ initrd_start_addr = (unsigned long)__pa_symbol(*initrd_start_p);
|
|
|
+#else
|
|
|
+ mc_saved_data_p = &mc_saved_data;
|
|
|
+ mc_saved_in_initrd_p = mc_saved_in_initrd;
|
|
|
+ initrd_start_addr = initrd_start;
|
|
|
+#endif
|
|
|
+
|
|
|
+ /*
|
|
|
+ * If there is no valid ucode previously saved in memory, no need to
|
|
|
+ * update ucode on this AP.
|
|
|
+ */
|
|
|
+ if (mc_saved_data_p->mc_saved_count == 0)
|
|
|
+ return;
|
|
|
+
|
|
|
+ collect_cpu_info_early(&uci);
|
|
|
+ load_microcode(mc_saved_data_p, mc_saved_in_initrd_p,
|
|
|
+ initrd_start_addr, &uci);
|
|
|
+ apply_microcode_early(mc_saved_data_p, &uci);
|
|
|
+}
|
Linus Torvalds