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@@ -1,33 +1,30 @@
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-* Freescale 83xx DMA Controller
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+* Freescale DMA Controllers
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-Freescale PowerPC 83xx have on chip general purpose DMA controllers.
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+** Freescale Elo DMA Controller
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+ This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
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+ series chips such as mpc8315, mpc8349, mpc8379 etc.
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Required properties:
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-- compatible : compatible list, contains 2 entries, first is
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- "fsl,CHIP-dma", where CHIP is the processor
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- (mpc8349, mpc8360, etc.) and the second is
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- "fsl,elo-dma"
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-- reg : <registers mapping for DMA general status reg>
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-- ranges : Should be defined as specified in 1) to describe the
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- DMA controller channels.
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+- compatible : must include "fsl,elo-dma"
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+- reg : DMA General Status Register, i.e. DGSR which contains
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+ status for all the 4 DMA channels
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+- ranges : describes the mapping between the address space of the
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+ DMA channels and the address space of the DMA controller
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- cell-index : controller index. 0 for controller @ 0x8100
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-- interrupts : <interrupt mapping for DMA IRQ>
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+- interrupts : interrupt specifier for DMA IRQ
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- interrupt-parent : optional, if needed for interrupt mapping
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-
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- DMA channel nodes:
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- - compatible : compatible list, contains 2 entries, first is
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- "fsl,CHIP-dma-channel", where CHIP is the processor
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- (mpc8349, mpc8350, etc.) and the second is
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- "fsl,elo-dma-channel". However, see note below.
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- - reg : <registers mapping for channel>
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- - cell-index : dma channel index starts at 0.
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+ - compatible : must include "fsl,elo-dma-channel"
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+ However, see note below.
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+ - reg : DMA channel specific registers
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+ - cell-index : DMA channel index starts at 0.
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Optional properties:
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- - interrupts : <interrupt mapping for DMA channel IRQ>
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- (on 83xx this is expected to be identical to
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- the interrupts property of the parent node)
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+ - interrupts : interrupt specifier for DMA channel IRQ
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+ (on 83xx this is expected to be identical to
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+ the interrupts property of the parent node)
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- interrupt-parent : optional, if needed for interrupt mapping
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Example:
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@@ -70,30 +67,27 @@ Example:
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};
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};
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-* Freescale 85xx/86xx DMA Controller
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-
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-Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
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+** Freescale EloPlus DMA Controller
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+ This is a 4-channel DMA controller with extended addresses and chaining,
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+ mainly used in Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as
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+ mpc8540, mpc8641 p4080, bsc9131 etc.
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Required properties:
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-- compatible : compatible list, contains 2 entries, first is
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- "fsl,CHIP-dma", where CHIP is the processor
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- (mpc8540, mpc8540, etc.) and the second is
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- "fsl,eloplus-dma"
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-- reg : <registers mapping for DMA general status reg>
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+- compatible : must include "fsl,eloplus-dma"
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+- reg : DMA General Status Register, i.e. DGSR which contains
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+ status for all the 4 DMA channels
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- cell-index : controller index. 0 for controller @ 0x21000,
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1 for controller @ 0xc000
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-- ranges : Should be defined as specified in 1) to describe the
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- DMA controller channels.
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+- ranges : describes the mapping between the address space of the
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+ DMA channels and the address space of the DMA controller
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- DMA channel nodes:
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- - compatible : compatible list, contains 2 entries, first is
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- "fsl,CHIP-dma-channel", where CHIP is the processor
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- (mpc8540, mpc8560, etc.) and the second is
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- "fsl,eloplus-dma-channel". However, see note below.
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- - cell-index : dma channel index starts at 0.
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- - reg : <registers mapping for channel>
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- - interrupts : <interrupt mapping for DMA channel IRQ>
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+ - compatible : must include "fsl,eloplus-dma-channel"
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+ However, see note below.
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+ - cell-index : DMA channel index starts at 0.
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+ - reg : DMA channel specific registers
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+ - interrupts : interrupt specifier for DMA channel IRQ
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- interrupt-parent : optional, if needed for interrupt mapping
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Example:
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