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@@ -16,8 +16,6 @@
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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-#include <linux/wait.h>
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-#include <linux/completion.h>
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#include <linux/interrupt.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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@@ -25,7 +23,6 @@
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#include <linux/io.h>
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#include <linux/slab.h>
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-#include <plat/dma.h>
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#include <plat/mcbsp.h>
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#include <plat/omap_device.h>
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#include <linux/pm_runtime.h>
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@@ -136,8 +133,6 @@ static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
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irqst_spcr2);
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/* Writing zero to XSYNC_ERR clears the IRQ */
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MCBSP_WRITE(mcbsp_tx, SPCR2, MCBSP_READ_CACHE(mcbsp_tx, SPCR2));
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- } else {
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- complete(&mcbsp_tx->tx_irq_completion);
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}
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return IRQ_HANDLED;
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@@ -156,41 +151,11 @@ static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
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irqst_spcr1);
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/* Writing zero to RSYNC_ERR clears the IRQ */
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MCBSP_WRITE(mcbsp_rx, SPCR1, MCBSP_READ_CACHE(mcbsp_rx, SPCR1));
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- } else {
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- complete(&mcbsp_rx->rx_irq_completion);
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}
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return IRQ_HANDLED;
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}
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-static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
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-{
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- struct omap_mcbsp *mcbsp_dma_tx = data;
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-
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- dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n",
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- MCBSP_READ(mcbsp_dma_tx, SPCR2));
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-
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- /* We can free the channels */
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- omap_free_dma(mcbsp_dma_tx->dma_tx_lch);
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- mcbsp_dma_tx->dma_tx_lch = -1;
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-
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- complete(&mcbsp_dma_tx->tx_dma_completion);
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-}
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-
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-static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
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-{
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- struct omap_mcbsp *mcbsp_dma_rx = data;
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-
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- dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n",
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- MCBSP_READ(mcbsp_dma_rx, SPCR2));
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-
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- /* We can free the channels */
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- omap_free_dma(mcbsp_dma_rx->dma_rx_lch);
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- mcbsp_dma_rx->dma_rx_lch = -1;
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-
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- complete(&mcbsp_dma_rx->rx_dma_completion);
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-}
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-
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/*
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* omap_mcbsp_config simply write a config to the
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* appropriate McBSP.
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@@ -758,37 +723,6 @@ static inline void omap_st_start(struct omap_mcbsp *mcbsp) {}
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static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {}
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#endif
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-/*
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- * We can choose between IRQ based or polled IO.
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- * This needs to be called before omap_mcbsp_request().
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- */
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-int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
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-{
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- struct omap_mcbsp *mcbsp;
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-
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- if (!omap_mcbsp_check_valid_id(id)) {
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- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
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- return -ENODEV;
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- }
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- mcbsp = id_to_mcbsp_ptr(id);
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-
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- spin_lock(&mcbsp->lock);
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-
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- if (!mcbsp->free) {
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- dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
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- mcbsp->id);
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- spin_unlock(&mcbsp->lock);
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- return -EINVAL;
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- }
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-
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- mcbsp->io_type = io_type;
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-
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- spin_unlock(&mcbsp->lock);
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-
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- return 0;
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-}
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-EXPORT_SYMBOL(omap_mcbsp_set_io_type);
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-
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int omap_mcbsp_request(unsigned int id)
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{
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struct omap_mcbsp *mcbsp;
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@@ -833,29 +767,24 @@ int omap_mcbsp_request(unsigned int id)
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MCBSP_WRITE(mcbsp, SPCR1, 0);
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MCBSP_WRITE(mcbsp, SPCR2, 0);
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- if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
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- /* We need to get IRQs here */
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- init_completion(&mcbsp->tx_irq_completion);
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- err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
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- 0, "McBSP", (void *)mcbsp);
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+ err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
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+ 0, "McBSP", (void *)mcbsp);
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+ if (err != 0) {
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+ dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
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+ "for McBSP%d\n", mcbsp->tx_irq,
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+ mcbsp->id);
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+ goto err_clk_disable;
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+ }
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+
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+ if (mcbsp->rx_irq) {
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+ err = request_irq(mcbsp->rx_irq,
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+ omap_mcbsp_rx_irq_handler,
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+ 0, "McBSP", (void *)mcbsp);
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if (err != 0) {
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- dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
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- "for McBSP%d\n", mcbsp->tx_irq,
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+ dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
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+ "for McBSP%d\n", mcbsp->rx_irq,
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mcbsp->id);
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- goto err_clk_disable;
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- }
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-
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- if (mcbsp->rx_irq) {
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- init_completion(&mcbsp->rx_irq_completion);
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- err = request_irq(mcbsp->rx_irq,
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- omap_mcbsp_rx_irq_handler,
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- 0, "McBSP", (void *)mcbsp);
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- if (err != 0) {
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- dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
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- "for McBSP%d\n", mcbsp->rx_irq,
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- mcbsp->id);
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- goto err_free_irq;
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- }
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+ goto err_free_irq;
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}
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}
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@@ -901,12 +830,9 @@ void omap_mcbsp_free(unsigned int id)
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pm_runtime_put_sync(mcbsp->dev);
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- if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
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- /* Free IRQs */
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- if (mcbsp->rx_irq)
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- free_irq(mcbsp->rx_irq, (void *)mcbsp);
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- free_irq(mcbsp->tx_irq, (void *)mcbsp);
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- }
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+ if (mcbsp->rx_irq)
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+ free_irq(mcbsp->rx_irq, (void *)mcbsp);
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+ free_irq(mcbsp->tx_irq, (void *)mcbsp);
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reg_cache = mcbsp->reg_cache;
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@@ -943,9 +869,6 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx)
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if (cpu_is_omap34xx())
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omap_st_start(mcbsp);
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- mcbsp->rx_word_length = (MCBSP_READ_CACHE(mcbsp, RCR1) >> 5) & 0x7;
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- mcbsp->tx_word_length = (MCBSP_READ_CACHE(mcbsp, XCR1) >> 5) & 0x7;
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-
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/* Only enable SRG, if McBSP is master */
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w = MCBSP_READ_CACHE(mcbsp, PCR0);
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if (w & (FSXM | FSRM | CLKXM | CLKRM))
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@@ -1043,485 +966,6 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
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}
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EXPORT_SYMBOL(omap_mcbsp_stop);
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-/* polled mcbsp i/o operations */
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-int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
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-{
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- struct omap_mcbsp *mcbsp;
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-
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- if (!omap_mcbsp_check_valid_id(id)) {
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- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
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- return -ENODEV;
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- }
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-
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- mcbsp = id_to_mcbsp_ptr(id);
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-
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- MCBSP_WRITE(mcbsp, DXR1, buf);
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- /* if frame sync error - clear the error */
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- if (MCBSP_READ(mcbsp, SPCR2) & XSYNC_ERR) {
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- /* clear error */
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- MCBSP_WRITE(mcbsp, SPCR2, MCBSP_READ_CACHE(mcbsp, SPCR2));
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- /* resend */
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- return -1;
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- } else {
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- /* wait for transmit confirmation */
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- int attemps = 0;
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- while (!(MCBSP_READ(mcbsp, SPCR2) & XRDY)) {
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- if (attemps++ > 1000) {
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- MCBSP_WRITE(mcbsp, SPCR2,
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- MCBSP_READ_CACHE(mcbsp, SPCR2) &
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- (~XRST));
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- udelay(10);
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- MCBSP_WRITE(mcbsp, SPCR2,
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- MCBSP_READ_CACHE(mcbsp, SPCR2) |
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- (XRST));
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- udelay(10);
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- dev_err(mcbsp->dev, "Could not write to"
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- " McBSP%d Register\n", mcbsp->id);
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- return -2;
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- }
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- }
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- }
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-
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- return 0;
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-}
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-EXPORT_SYMBOL(omap_mcbsp_pollwrite);
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-
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-int omap_mcbsp_pollread(unsigned int id, u16 *buf)
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-{
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- struct omap_mcbsp *mcbsp;
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-
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- if (!omap_mcbsp_check_valid_id(id)) {
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- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
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- return -ENODEV;
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- }
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- mcbsp = id_to_mcbsp_ptr(id);
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-
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- /* if frame sync error - clear the error */
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- if (MCBSP_READ(mcbsp, SPCR1) & RSYNC_ERR) {
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- /* clear error */
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- MCBSP_WRITE(mcbsp, SPCR1, MCBSP_READ_CACHE(mcbsp, SPCR1));
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- /* resend */
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- return -1;
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- } else {
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- /* wait for receive confirmation */
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- int attemps = 0;
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- while (!(MCBSP_READ(mcbsp, SPCR1) & RRDY)) {
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- if (attemps++ > 1000) {
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- MCBSP_WRITE(mcbsp, SPCR1,
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- MCBSP_READ_CACHE(mcbsp, SPCR1) &
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- (~RRST));
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- udelay(10);
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- MCBSP_WRITE(mcbsp, SPCR1,
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- MCBSP_READ_CACHE(mcbsp, SPCR1) |
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- (RRST));
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- udelay(10);
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- dev_err(mcbsp->dev, "Could not read from"
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- " McBSP%d Register\n", mcbsp->id);
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- return -2;
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- }
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- }
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- }
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- *buf = MCBSP_READ(mcbsp, DRR1);
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-
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- return 0;
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-}
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-EXPORT_SYMBOL(omap_mcbsp_pollread);
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-
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-/*
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- * IRQ based word transmission.
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- */
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-void omap_mcbsp_xmit_word(unsigned int id, u32 word)
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-{
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- struct omap_mcbsp *mcbsp;
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- omap_mcbsp_word_length word_length;
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-
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- if (!omap_mcbsp_check_valid_id(id)) {
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- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
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- return;
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- }
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-
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- mcbsp = id_to_mcbsp_ptr(id);
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- word_length = mcbsp->tx_word_length;
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-
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- wait_for_completion(&mcbsp->tx_irq_completion);
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-
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- if (word_length > OMAP_MCBSP_WORD_16)
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- MCBSP_WRITE(mcbsp, DXR2, word >> 16);
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- MCBSP_WRITE(mcbsp, DXR1, word & 0xffff);
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-}
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-EXPORT_SYMBOL(omap_mcbsp_xmit_word);
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-
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-u32 omap_mcbsp_recv_word(unsigned int id)
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-{
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- struct omap_mcbsp *mcbsp;
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- u16 word_lsb, word_msb = 0;
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- omap_mcbsp_word_length word_length;
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-
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- if (!omap_mcbsp_check_valid_id(id)) {
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- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
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- return -ENODEV;
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- }
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- mcbsp = id_to_mcbsp_ptr(id);
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-
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- word_length = mcbsp->rx_word_length;
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-
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- wait_for_completion(&mcbsp->rx_irq_completion);
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-
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- if (word_length > OMAP_MCBSP_WORD_16)
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- word_msb = MCBSP_READ(mcbsp, DRR2);
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- word_lsb = MCBSP_READ(mcbsp, DRR1);
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-
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- return (word_lsb | (word_msb << 16));
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-}
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-EXPORT_SYMBOL(omap_mcbsp_recv_word);
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-
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-int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
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-{
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- struct omap_mcbsp *mcbsp;
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- omap_mcbsp_word_length tx_word_length;
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- omap_mcbsp_word_length rx_word_length;
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- u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
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-
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- if (!omap_mcbsp_check_valid_id(id)) {
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- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
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- return -ENODEV;
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- }
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- mcbsp = id_to_mcbsp_ptr(id);
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- tx_word_length = mcbsp->tx_word_length;
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- rx_word_length = mcbsp->rx_word_length;
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-
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- if (tx_word_length != rx_word_length)
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- return -EINVAL;
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-
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- /* First we wait for the transmitter to be ready */
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- spcr2 = MCBSP_READ(mcbsp, SPCR2);
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- while (!(spcr2 & XRDY)) {
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- spcr2 = MCBSP_READ(mcbsp, SPCR2);
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- if (attempts++ > 1000) {
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- /* We must reset the transmitter */
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- MCBSP_WRITE(mcbsp, SPCR2,
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- MCBSP_READ_CACHE(mcbsp, SPCR2) & (~XRST));
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- udelay(10);
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- MCBSP_WRITE(mcbsp, SPCR2,
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- MCBSP_READ_CACHE(mcbsp, SPCR2) | XRST);
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- udelay(10);
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- dev_err(mcbsp->dev, "McBSP%d transmitter not "
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- "ready\n", mcbsp->id);
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- return -EAGAIN;
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- }
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- }
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-
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- /* Now we can push the data */
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- if (tx_word_length > OMAP_MCBSP_WORD_16)
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- MCBSP_WRITE(mcbsp, DXR2, word >> 16);
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- MCBSP_WRITE(mcbsp, DXR1, word & 0xffff);
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-
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- /* We wait for the receiver to be ready */
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- spcr1 = MCBSP_READ(mcbsp, SPCR1);
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- while (!(spcr1 & RRDY)) {
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- spcr1 = MCBSP_READ(mcbsp, SPCR1);
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- if (attempts++ > 1000) {
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- /* We must reset the receiver */
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- MCBSP_WRITE(mcbsp, SPCR1,
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- MCBSP_READ_CACHE(mcbsp, SPCR1) & (~RRST));
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- udelay(10);
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- MCBSP_WRITE(mcbsp, SPCR1,
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- MCBSP_READ_CACHE(mcbsp, SPCR1) | RRST);
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- udelay(10);
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- dev_err(mcbsp->dev, "McBSP%d receiver not "
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- "ready\n", mcbsp->id);
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- return -EAGAIN;
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- }
|
|
|
- }
|
|
|
-
|
|
|
- /* Receiver is ready, let's read the dummy data */
|
|
|
- if (rx_word_length > OMAP_MCBSP_WORD_16)
|
|
|
- word_msb = MCBSP_READ(mcbsp, DRR2);
|
|
|
- word_lsb = MCBSP_READ(mcbsp, DRR1);
|
|
|
-
|
|
|
- return 0;
|
|
|
-}
|
|
|
-EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll);
|
|
|
-
|
|
|
-int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
|
|
|
-{
|
|
|
- struct omap_mcbsp *mcbsp;
|
|
|
- u32 clock_word = 0;
|
|
|
- omap_mcbsp_word_length tx_word_length;
|
|
|
- omap_mcbsp_word_length rx_word_length;
|
|
|
- u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
|
|
|
-
|
|
|
- if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
|
|
- return -ENODEV;
|
|
|
- }
|
|
|
-
|
|
|
- mcbsp = id_to_mcbsp_ptr(id);
|
|
|
-
|
|
|
- tx_word_length = mcbsp->tx_word_length;
|
|
|
- rx_word_length = mcbsp->rx_word_length;
|
|
|
-
|
|
|
- if (tx_word_length != rx_word_length)
|
|
|
- return -EINVAL;
|
|
|
-
|
|
|
- /* First we wait for the transmitter to be ready */
|
|
|
- spcr2 = MCBSP_READ(mcbsp, SPCR2);
|
|
|
- while (!(spcr2 & XRDY)) {
|
|
|
- spcr2 = MCBSP_READ(mcbsp, SPCR2);
|
|
|
- if (attempts++ > 1000) {
|
|
|
- /* We must reset the transmitter */
|
|
|
- MCBSP_WRITE(mcbsp, SPCR2,
|
|
|
- MCBSP_READ_CACHE(mcbsp, SPCR2) & (~XRST));
|
|
|
- udelay(10);
|
|
|
- MCBSP_WRITE(mcbsp, SPCR2,
|
|
|
- MCBSP_READ_CACHE(mcbsp, SPCR2) | XRST);
|
|
|
- udelay(10);
|
|
|
- dev_err(mcbsp->dev, "McBSP%d transmitter not "
|
|
|
- "ready\n", mcbsp->id);
|
|
|
- return -EAGAIN;
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- /* We first need to enable the bus clock */
|
|
|
- if (tx_word_length > OMAP_MCBSP_WORD_16)
|
|
|
- MCBSP_WRITE(mcbsp, DXR2, clock_word >> 16);
|
|
|
- MCBSP_WRITE(mcbsp, DXR1, clock_word & 0xffff);
|
|
|
-
|
|
|
- /* We wait for the receiver to be ready */
|
|
|
- spcr1 = MCBSP_READ(mcbsp, SPCR1);
|
|
|
- while (!(spcr1 & RRDY)) {
|
|
|
- spcr1 = MCBSP_READ(mcbsp, SPCR1);
|
|
|
- if (attempts++ > 1000) {
|
|
|
- /* We must reset the receiver */
|
|
|
- MCBSP_WRITE(mcbsp, SPCR1,
|
|
|
- MCBSP_READ_CACHE(mcbsp, SPCR1) & (~RRST));
|
|
|
- udelay(10);
|
|
|
- MCBSP_WRITE(mcbsp, SPCR1,
|
|
|
- MCBSP_READ_CACHE(mcbsp, SPCR1) | RRST);
|
|
|
- udelay(10);
|
|
|
- dev_err(mcbsp->dev, "McBSP%d receiver not "
|
|
|
- "ready\n", mcbsp->id);
|
|
|
- return -EAGAIN;
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- /* Receiver is ready, there is something for us */
|
|
|
- if (rx_word_length > OMAP_MCBSP_WORD_16)
|
|
|
- word_msb = MCBSP_READ(mcbsp, DRR2);
|
|
|
- word_lsb = MCBSP_READ(mcbsp, DRR1);
|
|
|
-
|
|
|
- word[0] = (word_lsb | (word_msb << 16));
|
|
|
-
|
|
|
- return 0;
|
|
|
-}
|
|
|
-EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll);
|
|
|
-
|
|
|
-/*
|
|
|
- * Simple DMA based buffer rx/tx routines.
|
|
|
- * Nothing fancy, just a single buffer tx/rx through DMA.
|
|
|
- * The DMA resources are released once the transfer is done.
|
|
|
- * For anything fancier, you should use your own customized DMA
|
|
|
- * routines and callbacks.
|
|
|
- */
|
|
|
-int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
|
|
|
- unsigned int length)
|
|
|
-{
|
|
|
- struct omap_mcbsp *mcbsp;
|
|
|
- int dma_tx_ch;
|
|
|
- int src_port = 0;
|
|
|
- int dest_port = 0;
|
|
|
- int sync_dev = 0;
|
|
|
-
|
|
|
- if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
|
|
- return -ENODEV;
|
|
|
- }
|
|
|
- mcbsp = id_to_mcbsp_ptr(id);
|
|
|
-
|
|
|
- if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX",
|
|
|
- omap_mcbsp_tx_dma_callback,
|
|
|
- mcbsp,
|
|
|
- &dma_tx_ch)) {
|
|
|
- dev_err(mcbsp->dev, " Unable to request DMA channel for "
|
|
|
- "McBSP%d TX. Trying IRQ based TX\n",
|
|
|
- mcbsp->id);
|
|
|
- return -EAGAIN;
|
|
|
- }
|
|
|
- mcbsp->dma_tx_lch = dma_tx_ch;
|
|
|
-
|
|
|
- dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id,
|
|
|
- dma_tx_ch);
|
|
|
-
|
|
|
- init_completion(&mcbsp->tx_dma_completion);
|
|
|
-
|
|
|
- if (cpu_class_is_omap1()) {
|
|
|
- src_port = OMAP_DMA_PORT_TIPB;
|
|
|
- dest_port = OMAP_DMA_PORT_EMIFF;
|
|
|
- }
|
|
|
- if (cpu_class_is_omap2())
|
|
|
- sync_dev = mcbsp->dma_tx_sync;
|
|
|
-
|
|
|
- omap_set_dma_transfer_params(mcbsp->dma_tx_lch,
|
|
|
- OMAP_DMA_DATA_TYPE_S16,
|
|
|
- length >> 1, 1,
|
|
|
- OMAP_DMA_SYNC_ELEMENT,
|
|
|
- sync_dev, 0);
|
|
|
-
|
|
|
- omap_set_dma_dest_params(mcbsp->dma_tx_lch,
|
|
|
- src_port,
|
|
|
- OMAP_DMA_AMODE_CONSTANT,
|
|
|
- mcbsp->phys_base + OMAP_MCBSP_REG_DXR1,
|
|
|
- 0, 0);
|
|
|
-
|
|
|
- omap_set_dma_src_params(mcbsp->dma_tx_lch,
|
|
|
- dest_port,
|
|
|
- OMAP_DMA_AMODE_POST_INC,
|
|
|
- buffer,
|
|
|
- 0, 0);
|
|
|
-
|
|
|
- omap_start_dma(mcbsp->dma_tx_lch);
|
|
|
- wait_for_completion(&mcbsp->tx_dma_completion);
|
|
|
-
|
|
|
- return 0;
|
|
|
-}
|
|
|
-EXPORT_SYMBOL(omap_mcbsp_xmit_buffer);
|
|
|
-
|
|
|
-int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
|
|
|
- unsigned int length)
|
|
|
-{
|
|
|
- struct omap_mcbsp *mcbsp;
|
|
|
- int dma_rx_ch;
|
|
|
- int src_port = 0;
|
|
|
- int dest_port = 0;
|
|
|
- int sync_dev = 0;
|
|
|
-
|
|
|
- if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
|
|
- return -ENODEV;
|
|
|
- }
|
|
|
- mcbsp = id_to_mcbsp_ptr(id);
|
|
|
-
|
|
|
- if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX",
|
|
|
- omap_mcbsp_rx_dma_callback,
|
|
|
- mcbsp,
|
|
|
- &dma_rx_ch)) {
|
|
|
- dev_err(mcbsp->dev, "Unable to request DMA channel for "
|
|
|
- "McBSP%d RX. Trying IRQ based RX\n",
|
|
|
- mcbsp->id);
|
|
|
- return -EAGAIN;
|
|
|
- }
|
|
|
- mcbsp->dma_rx_lch = dma_rx_ch;
|
|
|
-
|
|
|
- dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id,
|
|
|
- dma_rx_ch);
|
|
|
-
|
|
|
- init_completion(&mcbsp->rx_dma_completion);
|
|
|
-
|
|
|
- if (cpu_class_is_omap1()) {
|
|
|
- src_port = OMAP_DMA_PORT_TIPB;
|
|
|
- dest_port = OMAP_DMA_PORT_EMIFF;
|
|
|
- }
|
|
|
- if (cpu_class_is_omap2())
|
|
|
- sync_dev = mcbsp->dma_rx_sync;
|
|
|
-
|
|
|
- omap_set_dma_transfer_params(mcbsp->dma_rx_lch,
|
|
|
- OMAP_DMA_DATA_TYPE_S16,
|
|
|
- length >> 1, 1,
|
|
|
- OMAP_DMA_SYNC_ELEMENT,
|
|
|
- sync_dev, 0);
|
|
|
-
|
|
|
- omap_set_dma_src_params(mcbsp->dma_rx_lch,
|
|
|
- src_port,
|
|
|
- OMAP_DMA_AMODE_CONSTANT,
|
|
|
- mcbsp->phys_base + OMAP_MCBSP_REG_DRR1,
|
|
|
- 0, 0);
|
|
|
-
|
|
|
- omap_set_dma_dest_params(mcbsp->dma_rx_lch,
|
|
|
- dest_port,
|
|
|
- OMAP_DMA_AMODE_POST_INC,
|
|
|
- buffer,
|
|
|
- 0, 0);
|
|
|
-
|
|
|
- omap_start_dma(mcbsp->dma_rx_lch);
|
|
|
- wait_for_completion(&mcbsp->rx_dma_completion);
|
|
|
-
|
|
|
- return 0;
|
|
|
-}
|
|
|
-EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
|
|
|
-
|
|
|
-/*
|
|
|
- * SPI wrapper.
|
|
|
- * Since SPI setup is much simpler than the generic McBSP one,
|
|
|
- * this wrapper just need an omap_mcbsp_spi_cfg structure as an input.
|
|
|
- * Once this is done, you can call omap_mcbsp_start().
|
|
|
- */
|
|
|
-void omap_mcbsp_set_spi_mode(unsigned int id,
|
|
|
- const struct omap_mcbsp_spi_cfg *spi_cfg)
|
|
|
-{
|
|
|
- struct omap_mcbsp *mcbsp;
|
|
|
- struct omap_mcbsp_reg_cfg mcbsp_cfg;
|
|
|
-
|
|
|
- if (!omap_mcbsp_check_valid_id(id)) {
|
|
|
- printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
|
|
|
- return;
|
|
|
- }
|
|
|
- mcbsp = id_to_mcbsp_ptr(id);
|
|
|
-
|
|
|
- memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg));
|
|
|
-
|
|
|
- /* SPI has only one frame */
|
|
|
- mcbsp_cfg.rcr1 |= (RWDLEN1(spi_cfg->word_length) | RFRLEN1(0));
|
|
|
- mcbsp_cfg.xcr1 |= (XWDLEN1(spi_cfg->word_length) | XFRLEN1(0));
|
|
|
-
|
|
|
- /* Clock stop mode */
|
|
|
- if (spi_cfg->clk_stp_mode == OMAP_MCBSP_CLK_STP_MODE_NO_DELAY)
|
|
|
- mcbsp_cfg.spcr1 |= (1 << 12);
|
|
|
- else
|
|
|
- mcbsp_cfg.spcr1 |= (3 << 11);
|
|
|
-
|
|
|
- /* Set clock parities */
|
|
|
- if (spi_cfg->rx_clock_polarity == OMAP_MCBSP_CLK_RISING)
|
|
|
- mcbsp_cfg.pcr0 |= CLKRP;
|
|
|
- else
|
|
|
- mcbsp_cfg.pcr0 &= ~CLKRP;
|
|
|
-
|
|
|
- if (spi_cfg->tx_clock_polarity == OMAP_MCBSP_CLK_RISING)
|
|
|
- mcbsp_cfg.pcr0 &= ~CLKXP;
|
|
|
- else
|
|
|
- mcbsp_cfg.pcr0 |= CLKXP;
|
|
|
-
|
|
|
- /* Set SCLKME to 0 and CLKSM to 1 */
|
|
|
- mcbsp_cfg.pcr0 &= ~SCLKME;
|
|
|
- mcbsp_cfg.srgr2 |= CLKSM;
|
|
|
-
|
|
|
- /* Set FSXP */
|
|
|
- if (spi_cfg->fsx_polarity == OMAP_MCBSP_FS_ACTIVE_HIGH)
|
|
|
- mcbsp_cfg.pcr0 &= ~FSXP;
|
|
|
- else
|
|
|
- mcbsp_cfg.pcr0 |= FSXP;
|
|
|
-
|
|
|
- if (spi_cfg->spi_mode == OMAP_MCBSP_SPI_MASTER) {
|
|
|
- mcbsp_cfg.pcr0 |= CLKXM;
|
|
|
- mcbsp_cfg.srgr1 |= CLKGDV(spi_cfg->clk_div - 1);
|
|
|
- mcbsp_cfg.pcr0 |= FSXM;
|
|
|
- mcbsp_cfg.srgr2 &= ~FSGM;
|
|
|
- mcbsp_cfg.xcr2 |= XDATDLY(1);
|
|
|
- mcbsp_cfg.rcr2 |= RDATDLY(1);
|
|
|
- } else {
|
|
|
- mcbsp_cfg.pcr0 &= ~CLKXM;
|
|
|
- mcbsp_cfg.srgr1 |= CLKGDV(1);
|
|
|
- mcbsp_cfg.pcr0 &= ~FSXM;
|
|
|
- mcbsp_cfg.xcr2 &= ~XDATDLY(3);
|
|
|
- mcbsp_cfg.rcr2 &= ~RDATDLY(3);
|
|
|
- }
|
|
|
-
|
|
|
- mcbsp_cfg.xcr2 &= ~XPHASE;
|
|
|
- mcbsp_cfg.rcr2 &= ~RPHASE;
|
|
|
-
|
|
|
- omap_mcbsp_config(id, &mcbsp_cfg);
|
|
|
-}
|
|
|
-EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
|
|
|
-
|
|
|
#ifdef CONFIG_ARCH_OMAP3
|
|
|
#define max_thres(m) (mcbsp->pdata->buffer_size)
|
|
|
#define valid_threshold(m, val) ((val) <= max_thres(m))
|
|
@@ -1833,8 +1277,6 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
|
|
|
spin_lock_init(&mcbsp->lock);
|
|
|
mcbsp->id = id + 1;
|
|
|
mcbsp->free = true;
|
|
|
- mcbsp->dma_tx_lch = -1;
|
|
|
- mcbsp->dma_rx_lch = -1;
|
|
|
|
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
|
|
|
if (!res) {
|
|
@@ -1860,9 +1302,6 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
|
|
|
else
|
|
|
mcbsp->phys_dma_base = res->start;
|
|
|
|
|
|
- /* Default I/O is IRQ based */
|
|
|
- mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
|
|
|
-
|
|
|
mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx");
|
|
|
mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx");
|
|
|
|