board-flash.c 6.2 KB

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  1. /*
  2. * board-flash.c
  3. * Modified from mach-omap2/board-3430sdp-flash.c
  4. *
  5. * Copyright (C) 2009 Nokia Corporation
  6. * Copyright (C) 2009 Texas Instruments
  7. *
  8. * Vimal Singh <vimalsingh@ti.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <linux/io.h>
  18. #include <plat/irqs.h>
  19. #include <plat/gpmc.h>
  20. #include <plat/nand.h>
  21. #include <plat/onenand.h>
  22. #include <plat/tc.h>
  23. #include "board-flash.h"
  24. #define REG_FPGA_REV 0x10
  25. #define REG_FPGA_DIP_SWITCH_INPUT2 0x60
  26. #define MAX_SUPPORTED_GPMC_CONFIG 3
  27. #define DEBUG_BASE 0x08000000 /* debug board */
  28. /* various memory sizes */
  29. #define FLASH_SIZE_SDPV1 SZ_64M /* NOR flash (64 Meg aligned) */
  30. #define FLASH_SIZE_SDPV2 SZ_128M /* NOR flash (256 Meg aligned) */
  31. static struct physmap_flash_data board_nor_data = {
  32. .width = 2,
  33. };
  34. static struct resource board_nor_resource = {
  35. .flags = IORESOURCE_MEM,
  36. };
  37. static struct platform_device board_nor_device = {
  38. .name = "physmap-flash",
  39. .id = 0,
  40. .dev = {
  41. .platform_data = &board_nor_data,
  42. },
  43. .num_resources = 1,
  44. .resource = &board_nor_resource,
  45. };
  46. static void
  47. __init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
  48. {
  49. int err;
  50. board_nor_data.parts = nor_parts;
  51. board_nor_data.nr_parts = nr_parts;
  52. /* Configure start address and size of NOR device */
  53. if (omap_rev() >= OMAP3430_REV_ES1_0) {
  54. err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1,
  55. (unsigned long *)&board_nor_resource.start);
  56. board_nor_resource.end = board_nor_resource.start
  57. + FLASH_SIZE_SDPV2 - 1;
  58. } else {
  59. err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1,
  60. (unsigned long *)&board_nor_resource.start);
  61. board_nor_resource.end = board_nor_resource.start
  62. + FLASH_SIZE_SDPV1 - 1;
  63. }
  64. if (err < 0) {
  65. pr_err("NOR: Can't request GPMC CS\n");
  66. return;
  67. }
  68. if (platform_device_register(&board_nor_device) < 0)
  69. pr_err("Unable to register NOR device\n");
  70. }
  71. #if defined(CONFIG_MTD_ONENAND_OMAP2) || \
  72. defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
  73. static struct omap_onenand_platform_data board_onenand_data = {
  74. .dma_channel = -1, /* disable DMA in OMAP OneNAND driver */
  75. };
  76. static void
  77. __init board_onenand_init(struct mtd_partition *onenand_parts,
  78. u8 nr_parts, u8 cs)
  79. {
  80. board_onenand_data.cs = cs;
  81. board_onenand_data.parts = onenand_parts;
  82. board_onenand_data.nr_parts = nr_parts;
  83. gpmc_onenand_init(&board_onenand_data);
  84. }
  85. #else
  86. static void
  87. __init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
  88. {
  89. }
  90. #endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
  91. #if defined(CONFIG_MTD_NAND_OMAP2) || \
  92. defined(CONFIG_MTD_NAND_OMAP2_MODULE)
  93. /* Note that all values in this struct are in nanoseconds */
  94. static struct gpmc_timings nand_timings = {
  95. .sync_clk = 0,
  96. .cs_on = 0,
  97. .cs_rd_off = 36,
  98. .cs_wr_off = 36,
  99. .adv_on = 6,
  100. .adv_rd_off = 24,
  101. .adv_wr_off = 36,
  102. .we_off = 30,
  103. .oe_off = 48,
  104. .access = 54,
  105. .rd_cycle = 72,
  106. .wr_cycle = 72,
  107. .wr_access = 30,
  108. .wr_data_mux_bus = 0,
  109. };
  110. static struct omap_nand_platform_data board_nand_data = {
  111. .gpmc_t = &nand_timings,
  112. };
  113. void
  114. __init board_nand_init(struct mtd_partition *nand_parts,
  115. u8 nr_parts, u8 cs, int nand_type)
  116. {
  117. board_nand_data.cs = cs;
  118. board_nand_data.parts = nand_parts;
  119. board_nand_data.nr_parts = nr_parts;
  120. board_nand_data.devsize = nand_type;
  121. board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
  122. board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs;
  123. gpmc_nand_init(&board_nand_data);
  124. }
  125. #else
  126. void
  127. __init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs, int nand_type)
  128. {
  129. }
  130. #endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
  131. /**
  132. * get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get
  133. * the various cs values.
  134. */
  135. static u8 get_gpmc0_type(void)
  136. {
  137. u8 cs = 0;
  138. void __iomem *fpga_map_addr;
  139. fpga_map_addr = ioremap(DEBUG_BASE, 4096);
  140. if (!fpga_map_addr)
  141. return -ENOMEM;
  142. if (!(__raw_readw(fpga_map_addr + REG_FPGA_REV)))
  143. /* we dont have an DEBUG FPGA??? */
  144. /* Depend on #defines!! default to strata boot return param */
  145. goto unmap;
  146. /* S8-DIP-OFF = 1, S8-DIP-ON = 0 */
  147. cs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;
  148. /* ES2.0 SDP's onwards 4 dip switches are provided for CS */
  149. if (omap_rev() >= OMAP3430_REV_ES1_0)
  150. /* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */
  151. cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) |
  152. ((cs & 2) << 1) | ((cs & 1) << 3);
  153. else
  154. /* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */
  155. cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2);
  156. unmap:
  157. iounmap(fpga_map_addr);
  158. return cs;
  159. }
  160. /**
  161. * board_flash_init - Identify devices connected to GPMC and register.
  162. *
  163. * @return - void.
  164. */
  165. void board_flash_init(struct flash_partitions partition_info[],
  166. char chip_sel_board[][GPMC_CS_NUM], int nand_type)
  167. {
  168. u8 cs = 0;
  169. u8 norcs = GPMC_CS_NUM + 1;
  170. u8 nandcs = GPMC_CS_NUM + 1;
  171. u8 onenandcs = GPMC_CS_NUM + 1;
  172. u8 idx;
  173. unsigned char *config_sel = NULL;
  174. /* REVISIT: Is this return correct idx for 2430 SDP?
  175. * for which cs configuration matches for 2430 SDP?
  176. */
  177. idx = get_gpmc0_type();
  178. if (idx >= MAX_SUPPORTED_GPMC_CONFIG) {
  179. pr_err("%s: Invalid chip select: %d\n", __func__, cs);
  180. return;
  181. }
  182. config_sel = (unsigned char *)(chip_sel_board[idx]);
  183. while (cs < GPMC_CS_NUM) {
  184. switch (config_sel[cs]) {
  185. case PDC_NOR:
  186. if (norcs > GPMC_CS_NUM)
  187. norcs = cs;
  188. break;
  189. case PDC_NAND:
  190. if (nandcs > GPMC_CS_NUM)
  191. nandcs = cs;
  192. break;
  193. case PDC_ONENAND:
  194. if (onenandcs > GPMC_CS_NUM)
  195. onenandcs = cs;
  196. break;
  197. };
  198. cs++;
  199. }
  200. if (norcs > GPMC_CS_NUM)
  201. pr_err("NOR: Unable to find configuration in GPMC\n");
  202. else
  203. board_nor_init(partition_info[0].parts,
  204. partition_info[0].nr_parts, norcs);
  205. if (onenandcs > GPMC_CS_NUM)
  206. pr_err("OneNAND: Unable to find configuration in GPMC\n");
  207. else
  208. board_onenand_init(partition_info[1].parts,
  209. partition_info[1].nr_parts, onenandcs);
  210. if (nandcs > GPMC_CS_NUM)
  211. pr_err("NAND: Unable to find configuration in GPMC\n");
  212. else
  213. board_nand_init(partition_info[2].parts,
  214. partition_info[2].nr_parts, nandcs, nand_type);
  215. }