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@@ -1844,12 +1844,14 @@ emulate_syscall(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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struct desc_struct cs, ss;
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u64 msr_data;
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u16 cs_sel, ss_sel;
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+ u64 efer = 0;
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/* syscall is not available in real mode */
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if (ctxt->mode == X86EMUL_MODE_REAL ||
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ctxt->mode == X86EMUL_MODE_VM86)
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return emulate_ud(ctxt);
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+ ops->get_msr(ctxt, MSR_EFER, &efer);
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setup_syscalls_segments(ctxt, ops, &cs, &ss);
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ops->get_msr(ctxt, MSR_STAR, &msr_data);
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@@ -1857,7 +1859,7 @@ emulate_syscall(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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cs_sel = (u16)(msr_data & 0xfffc);
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ss_sel = (u16)(msr_data + 8);
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- if (is_long_mode(ctxt->vcpu)) {
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+ if (efer & EFER_LMA) {
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cs.d = 0;
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cs.l = 1;
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}
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@@ -1867,7 +1869,7 @@ emulate_syscall(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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ops->set_segment_selector(ctxt, ss_sel, VCPU_SREG_SS);
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c->regs[VCPU_REGS_RCX] = c->eip;
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- if (is_long_mode(ctxt->vcpu)) {
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+ if (efer & EFER_LMA) {
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#ifdef CONFIG_X86_64
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c->regs[VCPU_REGS_R11] = ctxt->eflags & ~EFLG_RF;
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@@ -1897,7 +1899,9 @@ emulate_sysenter(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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struct desc_struct cs, ss;
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u64 msr_data;
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u16 cs_sel, ss_sel;
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+ u64 efer = 0;
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+ ctxt->ops->get_msr(ctxt, MSR_EFER, &efer);
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/* inject #GP if in real mode */
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if (ctxt->mode == X86EMUL_MODE_REAL)
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return emulate_gp(ctxt, 0);
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@@ -1927,8 +1931,7 @@ emulate_sysenter(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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cs_sel &= ~SELECTOR_RPL_MASK;
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ss_sel = cs_sel + 8;
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ss_sel &= ~SELECTOR_RPL_MASK;
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- if (ctxt->mode == X86EMUL_MODE_PROT64
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- || is_long_mode(ctxt->vcpu)) {
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+ if (ctxt->mode == X86EMUL_MODE_PROT64 || (efer & EFER_LMA)) {
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cs.d = 0;
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cs.l = 1;
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}
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@@ -2603,6 +2606,7 @@ static int check_cr_write(struct x86_emulate_ctxt *ctxt)
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struct decode_cache *c = &ctxt->decode;
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u64 new_val = c->src.val64;
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int cr = c->modrm_reg;
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+ u64 efer = 0;
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static u64 cr_reserved_bits[] = {
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0xffffffff00000000ULL,
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@@ -2620,7 +2624,7 @@ static int check_cr_write(struct x86_emulate_ctxt *ctxt)
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switch (cr) {
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case 0: {
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- u64 cr4, efer;
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+ u64 cr4;
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if (((new_val & X86_CR0_PG) && !(new_val & X86_CR0_PE)) ||
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((new_val & X86_CR0_NW) && !(new_val & X86_CR0_CD)))
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return emulate_gp(ctxt, 0);
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@@ -2637,7 +2641,8 @@ static int check_cr_write(struct x86_emulate_ctxt *ctxt)
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case 3: {
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u64 rsvd = 0;
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- if (is_long_mode(ctxt->vcpu))
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+ ctxt->ops->get_msr(ctxt, MSR_EFER, &efer);
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+ if (efer & EFER_LMA)
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rsvd = CR3_L_MODE_RESERVED_BITS;
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else if (is_pae(ctxt->vcpu))
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rsvd = CR3_PAE_RESERVED_BITS;
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@@ -2650,7 +2655,7 @@ static int check_cr_write(struct x86_emulate_ctxt *ctxt)
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break;
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}
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case 4: {
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- u64 cr4, efer;
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+ u64 cr4;
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cr4 = ctxt->ops->get_cr(ctxt, 4);
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ctxt->ops->get_msr(ctxt, MSR_EFER, &efer);
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