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@@ -261,8 +261,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
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* efuse_ctrl_cust
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* efuse_ctrl_std
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* elm
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- * emif1
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- * emif2
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* gpu
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* mcasp
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* mpu_c0
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@@ -812,6 +810,64 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = {
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},
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};
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+/*
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+ * 'emif' class
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+ * external memory interface no1
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+ */
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+
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+static struct omap_hwmod_class_sysconfig omap44xx_emif_sysc = {
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+ .rev_offs = 0x0000,
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+};
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+
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+static struct omap_hwmod_class omap44xx_emif_hwmod_class = {
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+ .name = "emif",
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+ .sysc = &omap44xx_emif_sysc,
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+};
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+
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+/* emif1 */
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+static struct omap_hwmod_irq_info omap44xx_emif1_irqs[] = {
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+ { .irq = 110 + OMAP44XX_IRQ_GIC_START },
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+ { .irq = -1 }
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+};
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+
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+static struct omap_hwmod omap44xx_emif1_hwmod = {
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+ .name = "emif1",
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+ .class = &omap44xx_emif_hwmod_class,
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+ .clkdm_name = "l3_emif_clkdm",
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+ .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
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+ .mpu_irqs = omap44xx_emif1_irqs,
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+ .main_clk = "ddrphy_ck",
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+ .prcm = {
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+ .omap4 = {
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+ .clkctrl_offs = OMAP4_CM_MEMIF_EMIF_1_CLKCTRL_OFFSET,
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+ .context_offs = OMAP4_RM_MEMIF_EMIF_1_CONTEXT_OFFSET,
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+ .modulemode = MODULEMODE_HWCTRL,
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+ },
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+ },
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+};
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+
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+/* emif2 */
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+static struct omap_hwmod_irq_info omap44xx_emif2_irqs[] = {
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+ { .irq = 111 + OMAP44XX_IRQ_GIC_START },
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+ { .irq = -1 }
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+};
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+
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+static struct omap_hwmod omap44xx_emif2_hwmod = {
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+ .name = "emif2",
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+ .class = &omap44xx_emif_hwmod_class,
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+ .clkdm_name = "l3_emif_clkdm",
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+ .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
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+ .mpu_irqs = omap44xx_emif2_irqs,
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+ .main_clk = "ddrphy_ck",
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+ .prcm = {
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+ .omap4 = {
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+ .clkctrl_offs = OMAP4_CM_MEMIF_EMIF_2_CLKCTRL_OFFSET,
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+ .context_offs = OMAP4_RM_MEMIF_EMIF_2_CONTEXT_OFFSET,
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+ .modulemode = MODULEMODE_HWCTRL,
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+ },
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+ },
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+};
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+
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/*
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* 'fdif' class
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* face detection hw accelerator module
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@@ -3673,6 +3729,42 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_venc = {
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.user = OCP_USER_MPU,
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};
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+static struct omap_hwmod_addr_space omap44xx_emif1_addrs[] = {
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+ {
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+ .pa_start = 0x4c000000,
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+ .pa_end = 0x4c0000ff,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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+
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+/* emif_fw -> emif1 */
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+static struct omap_hwmod_ocp_if omap44xx_emif_fw__emif1 = {
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+ .master = &omap44xx_emif_fw_hwmod,
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+ .slave = &omap44xx_emif1_hwmod,
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+ .clk = "l3_div_ck",
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+ .addr = omap44xx_emif1_addrs,
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+static struct omap_hwmod_addr_space omap44xx_emif2_addrs[] = {
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+ {
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+ .pa_start = 0x4d000000,
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+ .pa_end = 0x4d0000ff,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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+
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+/* emif_fw -> emif2 */
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+static struct omap_hwmod_ocp_if omap44xx_emif_fw__emif2 = {
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+ .master = &omap44xx_emif_fw_hwmod,
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+ .slave = &omap44xx_emif2_hwmod,
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+ .clk = "l3_div_ck",
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+ .addr = omap44xx_emif2_addrs,
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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static struct omap_hwmod_addr_space omap44xx_fdif_addrs[] = {
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{
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.pa_start = 0x4a10a000,
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@@ -4926,6 +5018,8 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
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&omap44xx_l4_per__dss_rfbi,
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&omap44xx_l3_main_2__dss_venc,
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&omap44xx_l4_per__dss_venc,
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+ &omap44xx_emif_fw__emif1,
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+ &omap44xx_emif_fw__emif2,
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&omap44xx_l4_cfg__fdif,
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&omap44xx_l4_wkup__gpio1,
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&omap44xx_l4_per__gpio2,
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