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@@ -28,19 +28,131 @@
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struct omap_crtc {
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struct drm_crtc base;
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struct drm_plane *plane;
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+
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const char *name;
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- int id;
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+ int pipe;
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+ enum omap_channel channel;
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+ struct omap_overlay_manager_info info;
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+
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+ /*
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+ * Temporary: eventually this will go away, but it is needed
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+ * for now to keep the output's happy. (They only need
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+ * mgr->id.) Eventually this will be replaced w/ something
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+ * more common-panel-framework-y
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+ */
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+ struct omap_overlay_manager mgr;
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+
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+ struct omap_video_timings timings;
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+ bool enabled;
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+ bool full_update;
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+
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+ struct omap_drm_apply apply;
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+
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+ struct omap_drm_irq apply_irq;
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+ struct omap_drm_irq error_irq;
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+
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+ /* list of in-progress apply's: */
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+ struct list_head pending_applies;
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+
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+ /* list of queued apply's: */
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+ struct list_head queued_applies;
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+
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+ /* for handling queued and in-progress applies: */
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+ struct work_struct apply_work;
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/* if there is a pending flip, these will be non-null: */
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struct drm_pending_vblank_event *event;
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struct drm_framebuffer *old_fb;
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+
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+ /* for handling page flips without caring about what
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+ * the callback is called from. Possibly we should just
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+ * make omap_gem always call the cb from the worker so
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+ * we don't have to care about this..
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+ *
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+ * XXX maybe fold into apply_work??
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+ */
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+ struct work_struct page_flip_work;
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+};
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+
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+/*
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+ * Manager-ops, callbacks from output when they need to configure
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+ * the upstream part of the video pipe.
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+ *
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+ * Most of these we can ignore until we add support for command-mode
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+ * panels.. for video-mode the crtc-helpers already do an adequate
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+ * job of sequencing the setup of the video pipe in the proper order
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+ */
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+
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+/* we can probably ignore these until we support command-mode panels: */
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+static void omap_crtc_start_update(struct omap_overlay_manager *mgr)
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+{
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+}
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+
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+static int omap_crtc_enable(struct omap_overlay_manager *mgr)
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+{
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+ return 0;
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+}
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+
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+static void omap_crtc_disable(struct omap_overlay_manager *mgr)
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+{
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+}
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+
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+static void omap_crtc_set_timings(struct omap_overlay_manager *mgr,
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+ const struct omap_video_timings *timings)
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+{
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+ struct omap_crtc *omap_crtc = container_of(mgr, struct omap_crtc, mgr);
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+ DBG("%s", omap_crtc->name);
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+ omap_crtc->timings = *timings;
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+ omap_crtc->full_update = true;
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+}
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+
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+static void omap_crtc_set_lcd_config(struct omap_overlay_manager *mgr,
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+ const struct dss_lcd_mgr_config *config)
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+{
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+ struct omap_crtc *omap_crtc = container_of(mgr, struct omap_crtc, mgr);
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+ DBG("%s", omap_crtc->name);
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+ dispc_mgr_set_lcd_config(omap_crtc->channel, config);
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+}
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+
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+static int omap_crtc_register_framedone_handler(
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+ struct omap_overlay_manager *mgr,
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+ void (*handler)(void *), void *data)
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+{
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+ return 0;
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+}
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+
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+static void omap_crtc_unregister_framedone_handler(
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+ struct omap_overlay_manager *mgr,
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+ void (*handler)(void *), void *data)
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+{
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+}
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+
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+static const struct dss_mgr_ops mgr_ops = {
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+ .start_update = omap_crtc_start_update,
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+ .enable = omap_crtc_enable,
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+ .disable = omap_crtc_disable,
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+ .set_timings = omap_crtc_set_timings,
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+ .set_lcd_config = omap_crtc_set_lcd_config,
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+ .register_framedone_handler = omap_crtc_register_framedone_handler,
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+ .unregister_framedone_handler = omap_crtc_unregister_framedone_handler,
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};
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+/*
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+ * CRTC funcs:
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+ */
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+
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static void omap_crtc_destroy(struct drm_crtc *crtc)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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+
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+ DBG("%s", omap_crtc->name);
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+
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+ WARN_ON(omap_crtc->apply_irq.registered);
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+ omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
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+
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omap_crtc->plane->funcs->destroy(omap_crtc->plane);
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drm_crtc_cleanup(crtc);
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+
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kfree(omap_crtc);
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}
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@@ -48,14 +160,25 @@ static void omap_crtc_dpms(struct drm_crtc *crtc, int mode)
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{
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struct omap_drm_private *priv = crtc->dev->dev_private;
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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+ bool enabled = (mode == DRM_MODE_DPMS_ON);
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int i;
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- WARN_ON(omap_plane_dpms(omap_crtc->plane, mode));
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+ DBG("%s: %d", omap_crtc->name, mode);
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+
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+ if (enabled != omap_crtc->enabled) {
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+ omap_crtc->enabled = enabled;
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+ omap_crtc->full_update = true;
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+ omap_crtc_apply(crtc, &omap_crtc->apply);
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- for (i = 0; i < priv->num_planes; i++) {
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- struct drm_plane *plane = priv->planes[i];
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- if (plane->crtc == crtc)
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- WARN_ON(omap_plane_dpms(plane, mode));
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+ /* also enable our private plane: */
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+ WARN_ON(omap_plane_dpms(omap_crtc->plane, mode));
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+
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+ /* and any attached overlay planes: */
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+ for (i = 0; i < priv->num_planes; i++) {
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+ struct drm_plane *plane = priv->planes[i];
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+ if (plane->crtc == crtc)
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+ WARN_ON(omap_plane_dpms(plane, mode));
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+ }
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}
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}
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@@ -73,12 +196,26 @@ static int omap_crtc_mode_set(struct drm_crtc *crtc,
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struct drm_framebuffer *old_fb)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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- struct drm_plane *plane = omap_crtc->plane;
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- return omap_plane_mode_set(plane, crtc, crtc->fb,
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+ mode = adjusted_mode;
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+
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+ DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
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+ omap_crtc->name, mode->base.id, mode->name,
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+ mode->vrefresh, mode->clock,
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+ mode->hdisplay, mode->hsync_start,
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+ mode->hsync_end, mode->htotal,
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+ mode->vdisplay, mode->vsync_start,
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+ mode->vsync_end, mode->vtotal,
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+ mode->type, mode->flags);
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+
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+ copy_timings_drm_to_omap(&omap_crtc->timings, mode);
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+ omap_crtc->full_update = true;
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+
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+ return omap_plane_mode_set(omap_crtc->plane, crtc, crtc->fb,
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0, 0, mode->hdisplay, mode->vdisplay,
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x << 16, y << 16,
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- mode->hdisplay << 16, mode->vdisplay << 16);
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+ mode->hdisplay << 16, mode->vdisplay << 16,
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+ NULL, NULL);
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}
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static void omap_crtc_prepare(struct drm_crtc *crtc)
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@@ -102,10 +239,11 @@ static int omap_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
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struct drm_plane *plane = omap_crtc->plane;
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struct drm_display_mode *mode = &crtc->mode;
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- return plane->funcs->update_plane(plane, crtc, crtc->fb,
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+ return omap_plane_mode_set(plane, crtc, crtc->fb,
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0, 0, mode->hdisplay, mode->vdisplay,
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x << 16, y << 16,
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- mode->hdisplay << 16, mode->vdisplay << 16);
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+ mode->hdisplay << 16, mode->vdisplay << 16,
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+ NULL, NULL);
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}
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static void omap_crtc_load_lut(struct drm_crtc *crtc)
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@@ -114,63 +252,54 @@ static void omap_crtc_load_lut(struct drm_crtc *crtc)
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static void vblank_cb(void *arg)
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{
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- static uint32_t sequence;
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struct drm_crtc *crtc = arg;
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struct drm_device *dev = crtc->dev;
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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- struct drm_pending_vblank_event *event = omap_crtc->event;
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unsigned long flags;
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- struct timeval now;
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- WARN_ON(!event);
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+ spin_lock_irqsave(&dev->event_lock, flags);
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+
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+ /* wakeup userspace */
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+ if (omap_crtc->event)
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+ drm_send_vblank_event(dev, omap_crtc->pipe, omap_crtc->event);
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omap_crtc->event = NULL;
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+ omap_crtc->old_fb = NULL;
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- /* wakeup userspace */
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- if (event) {
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- do_gettimeofday(&now);
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-
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- spin_lock_irqsave(&dev->event_lock, flags);
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- /* TODO: we can't yet use the vblank time accounting,
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- * because omapdss lower layer is the one that knows
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- * the irq # and registers the handler, which more or
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- * less defeats how drm_irq works.. for now just fake
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- * the sequence number and use gettimeofday..
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- *
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- event->event.sequence = drm_vblank_count_and_time(
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- dev, omap_crtc->id, &now);
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- */
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- event->event.sequence = sequence++;
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- event->event.tv_sec = now.tv_sec;
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- event->event.tv_usec = now.tv_usec;
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- list_add_tail(&event->base.link,
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- &event->base.file_priv->event_list);
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- wake_up_interruptible(&event->base.file_priv->event_wait);
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- spin_unlock_irqrestore(&dev->event_lock, flags);
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- }
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+ spin_unlock_irqrestore(&dev->event_lock, flags);
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}
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-static void page_flip_cb(void *arg)
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+static void page_flip_worker(struct work_struct *work)
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{
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- struct drm_crtc *crtc = arg;
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- struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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- struct drm_framebuffer *old_fb = omap_crtc->old_fb;
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+ struct omap_crtc *omap_crtc =
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+ container_of(work, struct omap_crtc, page_flip_work);
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+ struct drm_crtc *crtc = &omap_crtc->base;
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+ struct drm_device *dev = crtc->dev;
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+ struct drm_display_mode *mode = &crtc->mode;
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struct drm_gem_object *bo;
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- omap_crtc->old_fb = NULL;
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-
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- omap_crtc_mode_set_base(crtc, crtc->x, crtc->y, old_fb);
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-
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- /* really we'd like to setup the callback atomically w/ setting the
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- * new scanout buffer to avoid getting stuck waiting an extra vblank
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- * cycle.. for now go for correctness and later figure out speed..
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- */
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- omap_plane_on_endwin(omap_crtc->plane, vblank_cb, crtc);
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+ mutex_lock(&dev->mode_config.mutex);
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+ omap_plane_mode_set(omap_crtc->plane, crtc, crtc->fb,
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+ 0, 0, mode->hdisplay, mode->vdisplay,
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+ crtc->x << 16, crtc->y << 16,
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+ mode->hdisplay << 16, mode->vdisplay << 16,
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+ vblank_cb, crtc);
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+ mutex_unlock(&dev->mode_config.mutex);
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bo = omap_framebuffer_bo(crtc->fb, 0);
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drm_gem_object_unreference_unlocked(bo);
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}
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+static void page_flip_cb(void *arg)
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+{
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+ struct drm_crtc *crtc = arg;
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+ struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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+ struct omap_drm_private *priv = crtc->dev->dev_private;
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+
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+ /* avoid assumptions about what ctxt we are called from: */
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+ queue_work(priv->wq, &omap_crtc->page_flip_work);
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+}
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+
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static int omap_crtc_page_flip_locked(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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struct drm_pending_vblank_event *event)
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@@ -179,14 +308,14 @@ static int omap_crtc_page_flip_locked(struct drm_crtc *crtc,
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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struct drm_gem_object *bo;
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- DBG("%d -> %d", crtc->fb ? crtc->fb->base.id : -1, fb->base.id);
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+ DBG("%d -> %d (event=%p)", crtc->fb ? crtc->fb->base.id : -1,
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+ fb->base.id, event);
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- if (omap_crtc->event) {
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+ if (omap_crtc->old_fb) {
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dev_err(dev->dev, "already a pending flip\n");
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return -EINVAL;
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}
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- omap_crtc->old_fb = crtc->fb;
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omap_crtc->event = event;
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crtc->fb = fb;
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@@ -234,14 +363,244 @@ static const struct drm_crtc_helper_funcs omap_crtc_helper_funcs = {
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.load_lut = omap_crtc_load_lut,
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};
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+const struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc)
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+{
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+ struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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+ return &omap_crtc->timings;
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+}
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+
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+enum omap_channel omap_crtc_channel(struct drm_crtc *crtc)
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+{
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+ struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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+ return omap_crtc->channel;
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+}
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+
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+static void omap_crtc_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
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+{
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+ struct omap_crtc *omap_crtc =
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+ container_of(irq, struct omap_crtc, error_irq);
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+ struct drm_crtc *crtc = &omap_crtc->base;
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+ DRM_ERROR("%s: errors: %08x\n", omap_crtc->name, irqstatus);
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+ /* avoid getting in a flood, unregister the irq until next vblank */
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+ omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
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+}
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+
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+static void omap_crtc_apply_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
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+{
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+ struct omap_crtc *omap_crtc =
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+ container_of(irq, struct omap_crtc, apply_irq);
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+ struct drm_crtc *crtc = &omap_crtc->base;
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+
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+ if (!omap_crtc->error_irq.registered)
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+ omap_irq_register(crtc->dev, &omap_crtc->error_irq);
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+
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+ if (!dispc_mgr_go_busy(omap_crtc->channel)) {
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+ struct omap_drm_private *priv =
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+ crtc->dev->dev_private;
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+ DBG("%s: apply done", omap_crtc->name);
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+ omap_irq_unregister(crtc->dev, &omap_crtc->apply_irq);
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+ queue_work(priv->wq, &omap_crtc->apply_work);
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+ }
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+}
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+
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+static void apply_worker(struct work_struct *work)
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+{
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+ struct omap_crtc *omap_crtc =
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+ container_of(work, struct omap_crtc, apply_work);
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+ struct drm_crtc *crtc = &omap_crtc->base;
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+ struct drm_device *dev = crtc->dev;
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+ struct omap_drm_apply *apply, *n;
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+ bool need_apply;
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+
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+ /*
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+ * Synchronize everything on mode_config.mutex, to keep
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|
+ * the callbacks and list modification all serialized
|
|
|
+ * with respect to modesetting ioctls from userspace.
|
|
|
+ */
|
|
|
+ mutex_lock(&dev->mode_config.mutex);
|
|
|
+ dispc_runtime_get();
|
|
|
+
|
|
|
+ /*
|
|
|
+ * If we are still pending a previous update, wait.. when the
|
|
|
+ * pending update completes, we get kicked again.
|
|
|
+ */
|
|
|
+ if (omap_crtc->apply_irq.registered)
|
|
|
+ goto out;
|
|
|
+
|
|
|
+ /* finish up previous apply's: */
|
|
|
+ list_for_each_entry_safe(apply, n,
|
|
|
+ &omap_crtc->pending_applies, pending_node) {
|
|
|
+ apply->post_apply(apply);
|
|
|
+ list_del(&apply->pending_node);
|
|
|
+ }
|
|
|
+
|
|
|
+ need_apply = !list_empty(&omap_crtc->queued_applies);
|
|
|
+
|
|
|
+ /* then handle the next round of of queued apply's: */
|
|
|
+ list_for_each_entry_safe(apply, n,
|
|
|
+ &omap_crtc->queued_applies, queued_node) {
|
|
|
+ apply->pre_apply(apply);
|
|
|
+ list_del(&apply->queued_node);
|
|
|
+ apply->queued = false;
|
|
|
+ list_add_tail(&apply->pending_node,
|
|
|
+ &omap_crtc->pending_applies);
|
|
|
+ }
|
|
|
+
|
|
|
+ if (need_apply) {
|
|
|
+ enum omap_channel channel = omap_crtc->channel;
|
|
|
+
|
|
|
+ DBG("%s: GO", omap_crtc->name);
|
|
|
+
|
|
|
+ if (dispc_mgr_is_enabled(channel)) {
|
|
|
+ omap_irq_register(dev, &omap_crtc->apply_irq);
|
|
|
+ dispc_mgr_go(channel);
|
|
|
+ } else {
|
|
|
+ struct omap_drm_private *priv = dev->dev_private;
|
|
|
+ queue_work(priv->wq, &omap_crtc->apply_work);
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+out:
|
|
|
+ dispc_runtime_put();
|
|
|
+ mutex_unlock(&dev->mode_config.mutex);
|
|
|
+}
|
|
|
+
|
|
|
+int omap_crtc_apply(struct drm_crtc *crtc,
|
|
|
+ struct omap_drm_apply *apply)
|
|
|
+{
|
|
|
+ struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
|
|
|
+ struct drm_device *dev = crtc->dev;
|
|
|
+
|
|
|
+ WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
|
|
|
+
|
|
|
+ /* no need to queue it again if it is already queued: */
|
|
|
+ if (apply->queued)
|
|
|
+ return 0;
|
|
|
+
|
|
|
+ apply->queued = true;
|
|
|
+ list_add_tail(&apply->queued_node, &omap_crtc->queued_applies);
|
|
|
+
|
|
|
+ /*
|
|
|
+ * If there are no currently pending updates, then go ahead and
|
|
|
+ * kick the worker immediately, otherwise it will run again when
|
|
|
+ * the current update finishes.
|
|
|
+ */
|
|
|
+ if (list_empty(&omap_crtc->pending_applies)) {
|
|
|
+ struct omap_drm_private *priv = crtc->dev->dev_private;
|
|
|
+ queue_work(priv->wq, &omap_crtc->apply_work);
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+/* called only from apply */
|
|
|
+static void set_enabled(struct drm_crtc *crtc, bool enable)
|
|
|
+{
|
|
|
+ struct drm_device *dev = crtc->dev;
|
|
|
+ struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
|
|
|
+ enum omap_channel channel = omap_crtc->channel;
|
|
|
+ struct omap_irq_wait *wait = NULL;
|
|
|
+
|
|
|
+ if (dispc_mgr_is_enabled(channel) == enable)
|
|
|
+ return;
|
|
|
+
|
|
|
+ /* ignore sync-lost irqs during enable/disable */
|
|
|
+ omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
|
|
|
+
|
|
|
+ if (dispc_mgr_get_framedone_irq(channel)) {
|
|
|
+ if (!enable) {
|
|
|
+ wait = omap_irq_wait_init(dev,
|
|
|
+ dispc_mgr_get_framedone_irq(channel), 1);
|
|
|
+ }
|
|
|
+ } else {
|
|
|
+ /*
|
|
|
+ * When we disable digit output, we need to wait until fields
|
|
|
+ * are done. Otherwise the DSS is still working, and turning
|
|
|
+ * off the clocks prevents DSS from going to OFF mode. And when
|
|
|
+ * enabling, we need to wait for the extra sync losts
|
|
|
+ */
|
|
|
+ wait = omap_irq_wait_init(dev,
|
|
|
+ dispc_mgr_get_vsync_irq(channel), 2);
|
|
|
+ }
|
|
|
+
|
|
|
+ dispc_mgr_enable(channel, enable);
|
|
|
+
|
|
|
+ if (wait) {
|
|
|
+ int ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
|
|
|
+ if (ret) {
|
|
|
+ dev_err(dev->dev, "%s: timeout waiting for %s\n",
|
|
|
+ omap_crtc->name, enable ? "enable" : "disable");
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ omap_irq_register(crtc->dev, &omap_crtc->error_irq);
|
|
|
+}
|
|
|
+
|
|
|
+static void omap_crtc_pre_apply(struct omap_drm_apply *apply)
|
|
|
+{
|
|
|
+ struct omap_crtc *omap_crtc =
|
|
|
+ container_of(apply, struct omap_crtc, apply);
|
|
|
+ struct drm_crtc *crtc = &omap_crtc->base;
|
|
|
+ struct drm_encoder *encoder = NULL;
|
|
|
+
|
|
|
+ DBG("%s: enabled=%d, full=%d", omap_crtc->name,
|
|
|
+ omap_crtc->enabled, omap_crtc->full_update);
|
|
|
+
|
|
|
+ if (omap_crtc->full_update) {
|
|
|
+ struct omap_drm_private *priv = crtc->dev->dev_private;
|
|
|
+ int i;
|
|
|
+ for (i = 0; i < priv->num_encoders; i++) {
|
|
|
+ if (priv->encoders[i]->crtc == crtc) {
|
|
|
+ encoder = priv->encoders[i];
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ if (!omap_crtc->enabled) {
|
|
|
+ set_enabled(&omap_crtc->base, false);
|
|
|
+ if (encoder)
|
|
|
+ omap_encoder_set_enabled(encoder, false);
|
|
|
+ } else {
|
|
|
+ if (encoder) {
|
|
|
+ omap_encoder_set_enabled(encoder, false);
|
|
|
+ omap_encoder_update(encoder, &omap_crtc->mgr,
|
|
|
+ &omap_crtc->timings);
|
|
|
+ omap_encoder_set_enabled(encoder, true);
|
|
|
+ omap_crtc->full_update = false;
|
|
|
+ }
|
|
|
+
|
|
|
+ dispc_mgr_setup(omap_crtc->channel, &omap_crtc->info);
|
|
|
+ dispc_mgr_set_timings(omap_crtc->channel,
|
|
|
+ &omap_crtc->timings);
|
|
|
+ set_enabled(&omap_crtc->base, true);
|
|
|
+ }
|
|
|
+
|
|
|
+ omap_crtc->full_update = false;
|
|
|
+}
|
|
|
+
|
|
|
+static void omap_crtc_post_apply(struct omap_drm_apply *apply)
|
|
|
+{
|
|
|
+ /* nothing needed for post-apply */
|
|
|
+}
|
|
|
+
|
|
|
+static const char *channel_names[] = {
|
|
|
+ [OMAP_DSS_CHANNEL_LCD] = "lcd",
|
|
|
+ [OMAP_DSS_CHANNEL_DIGIT] = "tv",
|
|
|
+ [OMAP_DSS_CHANNEL_LCD2] = "lcd2",
|
|
|
+};
|
|
|
+
|
|
|
/* initialize crtc */
|
|
|
struct drm_crtc *omap_crtc_init(struct drm_device *dev,
|
|
|
- struct omap_overlay *ovl, int id)
|
|
|
+ struct drm_plane *plane, enum omap_channel channel, int id)
|
|
|
{
|
|
|
struct drm_crtc *crtc = NULL;
|
|
|
- struct omap_crtc *omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
|
|
|
+ struct omap_crtc *omap_crtc;
|
|
|
+ struct omap_overlay_manager_info *info;
|
|
|
+
|
|
|
+ DBG("%s", channel_names[channel]);
|
|
|
|
|
|
- DBG("%s", ovl->name);
|
|
|
+ omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
|
|
|
|
|
|
if (!omap_crtc) {
|
|
|
dev_err(dev->dev, "could not allocate CRTC\n");
|
|
@@ -250,10 +609,40 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev,
|
|
|
|
|
|
crtc = &omap_crtc->base;
|
|
|
|
|
|
- omap_crtc->plane = omap_plane_init(dev, ovl, (1 << id), true);
|
|
|
+ INIT_WORK(&omap_crtc->page_flip_work, page_flip_worker);
|
|
|
+ INIT_WORK(&omap_crtc->apply_work, apply_worker);
|
|
|
+
|
|
|
+ INIT_LIST_HEAD(&omap_crtc->pending_applies);
|
|
|
+ INIT_LIST_HEAD(&omap_crtc->queued_applies);
|
|
|
+
|
|
|
+ omap_crtc->apply.pre_apply = omap_crtc_pre_apply;
|
|
|
+ omap_crtc->apply.post_apply = omap_crtc_post_apply;
|
|
|
+
|
|
|
+ omap_crtc->apply_irq.irqmask = pipe2vbl(id);
|
|
|
+ omap_crtc->apply_irq.irq = omap_crtc_apply_irq;
|
|
|
+
|
|
|
+ omap_crtc->error_irq.irqmask =
|
|
|
+ dispc_mgr_get_sync_lost_irq(channel);
|
|
|
+ omap_crtc->error_irq.irq = omap_crtc_error_irq;
|
|
|
+ omap_irq_register(dev, &omap_crtc->error_irq);
|
|
|
+
|
|
|
+ omap_crtc->channel = channel;
|
|
|
+ omap_crtc->plane = plane;
|
|
|
omap_crtc->plane->crtc = crtc;
|
|
|
- omap_crtc->name = ovl->name;
|
|
|
- omap_crtc->id = id;
|
|
|
+ omap_crtc->name = channel_names[channel];
|
|
|
+ omap_crtc->pipe = id;
|
|
|
+
|
|
|
+ /* temporary: */
|
|
|
+ omap_crtc->mgr.id = channel;
|
|
|
+
|
|
|
+ dss_install_mgr_ops(&mgr_ops);
|
|
|
+
|
|
|
+ /* TODO: fix hard-coded setup.. add properties! */
|
|
|
+ info = &omap_crtc->info;
|
|
|
+ info->default_color = 0x00000000;
|
|
|
+ info->trans_key = 0x00000000;
|
|
|
+ info->trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
|
|
|
+ info->trans_enabled = false;
|
|
|
|
|
|
drm_crtc_init(dev, crtc, &omap_crtc_funcs);
|
|
|
drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);
|