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@@ -52,6 +52,7 @@ void ath_tx_complete_poll_work(struct work_struct *work)
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"tx hung, resetting the chip\n");
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RESET_STAT_INC(sc, RESET_TYPE_TX_HANG);
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ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
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+ return;
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}
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ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work,
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@@ -107,9 +108,9 @@ out:
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}
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/*
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- * PLL-WAR for AR9485.
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+ * PLL-WAR for AR9485/AR9340
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*/
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-static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
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+static bool ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
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{
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static int count;
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struct ath_common *common = ath9k_hw_common(sc->sc_ah);
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@@ -117,29 +118,33 @@ static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
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if (pll_sqsum >= 0x40000) {
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count++;
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if (count == 3) {
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- /* Rx is hung for more than 500ms. Reset it */
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- ath_dbg(common, RESET, "Possible RX hang, resetting\n");
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+ ath_dbg(common, RESET, "PLL WAR, resetting the chip\n");
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RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
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ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
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count = 0;
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+ return true;
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}
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- } else
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+ } else {
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count = 0;
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+ }
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+
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+ return false;
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}
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void ath_hw_pll_work(struct work_struct *work)
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{
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+ u32 pll_sqsum;
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struct ath_softc *sc = container_of(work, struct ath_softc,
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hw_pll_work.work);
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- u32 pll_sqsum;
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- if (AR_SREV_9485(sc->sc_ah)) {
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- ath9k_ps_wakeup(sc);
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- pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
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- ath9k_ps_restore(sc);
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- ath_hw_pll_rx_hang_check(sc, pll_sqsum);
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- ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
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- }
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+ ath9k_ps_wakeup(sc);
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+ pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
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+ ath9k_ps_restore(sc);
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+ if (ath_hw_pll_rx_hang_check(sc, pll_sqsum))
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+ return;
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+
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+ ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
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+ msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
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}
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/*
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@@ -293,7 +298,7 @@ void ath_paprd_calibrate(struct work_struct *work)
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if (ar9003_paprd_create_curve(ah, caldata, chain)) {
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ath_dbg(common, CALIBRATE,
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"PAPRD create curve failed on chain %d\n",
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- chain);
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+ chain);
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break;
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}
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