link.c 13 KB

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  1. /*
  2. * Copyright (c) 2012 Qualcomm Atheros, Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "ath9k.h"
  17. /*
  18. * TX polling - checks if the TX engine is stuck somewhere
  19. * and issues a chip reset if so.
  20. */
  21. void ath_tx_complete_poll_work(struct work_struct *work)
  22. {
  23. struct ath_softc *sc = container_of(work, struct ath_softc,
  24. tx_complete_work.work);
  25. struct ath_txq *txq;
  26. int i;
  27. bool needreset = false;
  28. #ifdef CONFIG_ATH9K_DEBUGFS
  29. sc->tx_complete_poll_work_seen++;
  30. #endif
  31. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
  32. if (ATH_TXQ_SETUP(sc, i)) {
  33. txq = &sc->tx.txq[i];
  34. ath_txq_lock(sc, txq);
  35. if (txq->axq_depth) {
  36. if (txq->axq_tx_inprogress) {
  37. needreset = true;
  38. ath_txq_unlock(sc, txq);
  39. break;
  40. } else {
  41. txq->axq_tx_inprogress = true;
  42. }
  43. }
  44. ath_txq_unlock_complete(sc, txq);
  45. }
  46. if (needreset) {
  47. ath_dbg(ath9k_hw_common(sc->sc_ah), RESET,
  48. "tx hung, resetting the chip\n");
  49. RESET_STAT_INC(sc, RESET_TYPE_TX_HANG);
  50. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  51. return;
  52. }
  53. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work,
  54. msecs_to_jiffies(ATH_TX_COMPLETE_POLL_INT));
  55. }
  56. /*
  57. * Checks if the BB/MAC is hung.
  58. */
  59. void ath_hw_check(struct work_struct *work)
  60. {
  61. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  62. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  63. unsigned long flags;
  64. int busy;
  65. u8 is_alive, nbeacon = 1;
  66. ath9k_ps_wakeup(sc);
  67. is_alive = ath9k_hw_check_alive(sc->sc_ah);
  68. if (is_alive && !AR_SREV_9300(sc->sc_ah))
  69. goto out;
  70. else if (!is_alive && AR_SREV_9300(sc->sc_ah)) {
  71. ath_dbg(common, RESET,
  72. "DCU stuck is detected. Schedule chip reset\n");
  73. RESET_STAT_INC(sc, RESET_TYPE_MAC_HANG);
  74. goto sched_reset;
  75. }
  76. spin_lock_irqsave(&common->cc_lock, flags);
  77. busy = ath_update_survey_stats(sc);
  78. spin_unlock_irqrestore(&common->cc_lock, flags);
  79. ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n",
  80. busy, sc->hw_busy_count + 1);
  81. if (busy >= 99) {
  82. if (++sc->hw_busy_count >= 3) {
  83. RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
  84. goto sched_reset;
  85. }
  86. } else if (busy >= 0) {
  87. sc->hw_busy_count = 0;
  88. nbeacon = 3;
  89. }
  90. ath_start_rx_poll(sc, nbeacon);
  91. goto out;
  92. sched_reset:
  93. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  94. out:
  95. ath9k_ps_restore(sc);
  96. }
  97. /*
  98. * PLL-WAR for AR9485/AR9340
  99. */
  100. static bool ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
  101. {
  102. static int count;
  103. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  104. if (pll_sqsum >= 0x40000) {
  105. count++;
  106. if (count == 3) {
  107. ath_dbg(common, RESET, "PLL WAR, resetting the chip\n");
  108. RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
  109. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  110. count = 0;
  111. return true;
  112. }
  113. } else {
  114. count = 0;
  115. }
  116. return false;
  117. }
  118. void ath_hw_pll_work(struct work_struct *work)
  119. {
  120. u32 pll_sqsum;
  121. struct ath_softc *sc = container_of(work, struct ath_softc,
  122. hw_pll_work.work);
  123. ath9k_ps_wakeup(sc);
  124. pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
  125. ath9k_ps_restore(sc);
  126. if (ath_hw_pll_rx_hang_check(sc, pll_sqsum))
  127. return;
  128. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
  129. msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
  130. }
  131. /*
  132. * RX Polling - monitors baseband hangs.
  133. */
  134. void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon)
  135. {
  136. if (!AR_SREV_9300(sc->sc_ah))
  137. return;
  138. if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF))
  139. return;
  140. mod_timer(&sc->rx_poll_timer, jiffies + msecs_to_jiffies
  141. (nbeacon * sc->cur_beacon_conf.beacon_interval));
  142. }
  143. void ath_rx_poll(unsigned long data)
  144. {
  145. struct ath_softc *sc = (struct ath_softc *)data;
  146. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  147. }
  148. /*
  149. * PA Pre-distortion.
  150. */
  151. static void ath_paprd_activate(struct ath_softc *sc)
  152. {
  153. struct ath_hw *ah = sc->sc_ah;
  154. struct ath9k_hw_cal_data *caldata = ah->caldata;
  155. int chain;
  156. if (!caldata || !caldata->paprd_done)
  157. return;
  158. ath9k_ps_wakeup(sc);
  159. ar9003_paprd_enable(ah, false);
  160. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  161. if (!(ah->txchainmask & BIT(chain)))
  162. continue;
  163. ar9003_paprd_populate_single_table(ah, caldata, chain);
  164. }
  165. ar9003_paprd_enable(ah, true);
  166. ath9k_ps_restore(sc);
  167. }
  168. static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
  169. {
  170. struct ieee80211_hw *hw = sc->hw;
  171. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  172. struct ath_hw *ah = sc->sc_ah;
  173. struct ath_common *common = ath9k_hw_common(ah);
  174. struct ath_tx_control txctl;
  175. int time_left;
  176. memset(&txctl, 0, sizeof(txctl));
  177. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  178. memset(tx_info, 0, sizeof(*tx_info));
  179. tx_info->band = hw->conf.channel->band;
  180. tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
  181. tx_info->control.rates[0].idx = 0;
  182. tx_info->control.rates[0].count = 1;
  183. tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
  184. tx_info->control.rates[1].idx = -1;
  185. init_completion(&sc->paprd_complete);
  186. txctl.paprd = BIT(chain);
  187. if (ath_tx_start(hw, skb, &txctl) != 0) {
  188. ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
  189. dev_kfree_skb_any(skb);
  190. return false;
  191. }
  192. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  193. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  194. if (!time_left)
  195. ath_dbg(common, CALIBRATE,
  196. "Timeout waiting for paprd training on TX chain %d\n",
  197. chain);
  198. return !!time_left;
  199. }
  200. void ath_paprd_calibrate(struct work_struct *work)
  201. {
  202. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  203. struct ieee80211_hw *hw = sc->hw;
  204. struct ath_hw *ah = sc->sc_ah;
  205. struct ieee80211_hdr *hdr;
  206. struct sk_buff *skb = NULL;
  207. struct ath9k_hw_cal_data *caldata = ah->caldata;
  208. struct ath_common *common = ath9k_hw_common(ah);
  209. int ftype;
  210. int chain_ok = 0;
  211. int chain;
  212. int len = 1800;
  213. if (!caldata)
  214. return;
  215. ath9k_ps_wakeup(sc);
  216. if (ar9003_paprd_init_table(ah) < 0)
  217. goto fail_paprd;
  218. skb = alloc_skb(len, GFP_KERNEL);
  219. if (!skb)
  220. goto fail_paprd;
  221. skb_put(skb, len);
  222. memset(skb->data, 0, len);
  223. hdr = (struct ieee80211_hdr *)skb->data;
  224. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  225. hdr->frame_control = cpu_to_le16(ftype);
  226. hdr->duration_id = cpu_to_le16(10);
  227. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  228. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  229. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  230. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  231. if (!(ah->txchainmask & BIT(chain)))
  232. continue;
  233. chain_ok = 0;
  234. ath_dbg(common, CALIBRATE,
  235. "Sending PAPRD frame for thermal measurement on chain %d\n",
  236. chain);
  237. if (!ath_paprd_send_frame(sc, skb, chain))
  238. goto fail_paprd;
  239. ar9003_paprd_setup_gain_table(ah, chain);
  240. ath_dbg(common, CALIBRATE,
  241. "Sending PAPRD training frame on chain %d\n", chain);
  242. if (!ath_paprd_send_frame(sc, skb, chain))
  243. goto fail_paprd;
  244. if (!ar9003_paprd_is_done(ah)) {
  245. ath_dbg(common, CALIBRATE,
  246. "PAPRD not yet done on chain %d\n", chain);
  247. break;
  248. }
  249. if (ar9003_paprd_create_curve(ah, caldata, chain)) {
  250. ath_dbg(common, CALIBRATE,
  251. "PAPRD create curve failed on chain %d\n",
  252. chain);
  253. break;
  254. }
  255. chain_ok = 1;
  256. }
  257. kfree_skb(skb);
  258. if (chain_ok) {
  259. caldata->paprd_done = true;
  260. ath_paprd_activate(sc);
  261. }
  262. fail_paprd:
  263. ath9k_ps_restore(sc);
  264. }
  265. /*
  266. * ANI performs periodic noise floor calibration
  267. * that is used to adjust and optimize the chip performance. This
  268. * takes environmental changes (location, temperature) into account.
  269. * When the task is complete, it reschedules itself depending on the
  270. * appropriate interval that was calculated.
  271. */
  272. void ath_ani_calibrate(unsigned long data)
  273. {
  274. struct ath_softc *sc = (struct ath_softc *)data;
  275. struct ath_hw *ah = sc->sc_ah;
  276. struct ath_common *common = ath9k_hw_common(ah);
  277. bool longcal = false;
  278. bool shortcal = false;
  279. bool aniflag = false;
  280. unsigned int timestamp = jiffies_to_msecs(jiffies);
  281. u32 cal_interval, short_cal_interval, long_cal_interval;
  282. unsigned long flags;
  283. if (ah->caldata && ah->caldata->nfcal_interference)
  284. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  285. else
  286. long_cal_interval = ATH_LONG_CALINTERVAL;
  287. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  288. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  289. /* Only calibrate if awake */
  290. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  291. goto set_timer;
  292. ath9k_ps_wakeup(sc);
  293. /* Long calibration runs independently of short calibration. */
  294. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  295. longcal = true;
  296. common->ani.longcal_timer = timestamp;
  297. }
  298. /* Short calibration applies only while caldone is false */
  299. if (!common->ani.caldone) {
  300. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  301. shortcal = true;
  302. common->ani.shortcal_timer = timestamp;
  303. common->ani.resetcal_timer = timestamp;
  304. }
  305. } else {
  306. if ((timestamp - common->ani.resetcal_timer) >=
  307. ATH_RESTART_CALINTERVAL) {
  308. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  309. if (common->ani.caldone)
  310. common->ani.resetcal_timer = timestamp;
  311. }
  312. }
  313. /* Verify whether we must check ANI */
  314. if (sc->sc_ah->config.enable_ani
  315. && (timestamp - common->ani.checkani_timer) >=
  316. ah->config.ani_poll_interval) {
  317. aniflag = true;
  318. common->ani.checkani_timer = timestamp;
  319. }
  320. /* Call ANI routine if necessary */
  321. if (aniflag) {
  322. spin_lock_irqsave(&common->cc_lock, flags);
  323. ath9k_hw_ani_monitor(ah, ah->curchan);
  324. ath_update_survey_stats(sc);
  325. spin_unlock_irqrestore(&common->cc_lock, flags);
  326. }
  327. /* Perform calibration if necessary */
  328. if (longcal || shortcal) {
  329. common->ani.caldone =
  330. ath9k_hw_calibrate(ah, ah->curchan,
  331. ah->rxchainmask, longcal);
  332. }
  333. ath_dbg(common, ANI,
  334. "Calibration @%lu finished: %s %s %s, caldone: %s\n",
  335. jiffies,
  336. longcal ? "long" : "", shortcal ? "short" : "",
  337. aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
  338. ath9k_ps_restore(sc);
  339. set_timer:
  340. /*
  341. * Set timer interval based on previous results.
  342. * The interval must be the shortest necessary to satisfy ANI,
  343. * short calibration and long calibration.
  344. */
  345. ath9k_debug_samp_bb_mac(sc);
  346. cal_interval = ATH_LONG_CALINTERVAL;
  347. if (sc->sc_ah->config.enable_ani)
  348. cal_interval = min(cal_interval,
  349. (u32)ah->config.ani_poll_interval);
  350. if (!common->ani.caldone)
  351. cal_interval = min(cal_interval, (u32)short_cal_interval);
  352. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  353. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  354. if (!ah->caldata->paprd_done)
  355. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  356. else if (!ah->paprd_table_write_done)
  357. ath_paprd_activate(sc);
  358. }
  359. }
  360. void ath_start_ani(struct ath_common *common)
  361. {
  362. struct ath_hw *ah = common->ah;
  363. unsigned long timestamp = jiffies_to_msecs(jiffies);
  364. struct ath_softc *sc = (struct ath_softc *) common->priv;
  365. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  366. return;
  367. if (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  368. return;
  369. common->ani.longcal_timer = timestamp;
  370. common->ani.shortcal_timer = timestamp;
  371. common->ani.checkani_timer = timestamp;
  372. mod_timer(&common->ani.timer,
  373. jiffies + msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  374. }
  375. void ath_update_survey_nf(struct ath_softc *sc, int channel)
  376. {
  377. struct ath_hw *ah = sc->sc_ah;
  378. struct ath9k_channel *chan = &ah->channels[channel];
  379. struct survey_info *survey = &sc->survey[channel];
  380. if (chan->noisefloor) {
  381. survey->filled |= SURVEY_INFO_NOISE_DBM;
  382. survey->noise = ath9k_hw_getchan_noise(ah, chan);
  383. }
  384. }
  385. /*
  386. * Updates the survey statistics and returns the busy time since last
  387. * update in %, if the measurement duration was long enough for the
  388. * result to be useful, -1 otherwise.
  389. */
  390. int ath_update_survey_stats(struct ath_softc *sc)
  391. {
  392. struct ath_hw *ah = sc->sc_ah;
  393. struct ath_common *common = ath9k_hw_common(ah);
  394. int pos = ah->curchan - &ah->channels[0];
  395. struct survey_info *survey = &sc->survey[pos];
  396. struct ath_cycle_counters *cc = &common->cc_survey;
  397. unsigned int div = common->clockrate * 1000;
  398. int ret = 0;
  399. if (!ah->curchan)
  400. return -1;
  401. if (ah->power_mode == ATH9K_PM_AWAKE)
  402. ath_hw_cycle_counters_update(common);
  403. if (cc->cycles > 0) {
  404. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  405. SURVEY_INFO_CHANNEL_TIME_BUSY |
  406. SURVEY_INFO_CHANNEL_TIME_RX |
  407. SURVEY_INFO_CHANNEL_TIME_TX;
  408. survey->channel_time += cc->cycles / div;
  409. survey->channel_time_busy += cc->rx_busy / div;
  410. survey->channel_time_rx += cc->rx_frame / div;
  411. survey->channel_time_tx += cc->tx_frame / div;
  412. }
  413. if (cc->cycles < div)
  414. return -1;
  415. if (cc->cycles > 0)
  416. ret = cc->rx_busy * 100 / cc->cycles;
  417. memset(cc, 0, sizeof(*cc));
  418. ath_update_survey_nf(sc, pos);
  419. return ret;
  420. }