|
@@ -811,6 +811,8 @@ static struct clk dpll4_m4_ck = {
|
|
|
.clksel = div16_dpll4_clksel,
|
|
|
.flags = RATE_PROPAGATES,
|
|
|
.recalc = &omap2_clksel_recalc,
|
|
|
+ .set_rate = &omap2_clksel_set_rate,
|
|
|
+ .round_rate = &omap2_clksel_round_rate,
|
|
|
};
|
|
|
|
|
|
/* The PWRDN bit is apparently only available on 3430ES2 and above */
|