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@@ -58,11 +58,19 @@ void __init generate_cplb_tables_cpu(unsigned int cpu)
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#ifdef CONFIG_ROMKERNEL
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/* Cover kernel XIP flash area */
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+#ifdef CONFIG_BF60x
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+ addr = CONFIG_ROM_BASE & ~(16 * 1024 * 1024 - 1);
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+ d_tbl[i_d].addr = addr;
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+ d_tbl[i_d++].data = SDRAM_DGENERIC | PAGE_SIZE_16MB;
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+ i_tbl[i_i].addr = addr;
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+ i_tbl[i_i++].data = SDRAM_IGENERIC | PAGE_SIZE_16MB;
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+#else
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addr = CONFIG_ROM_BASE & ~(4 * 1024 * 1024 - 1);
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d_tbl[i_d].addr = addr;
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d_tbl[i_d++].data = SDRAM_DGENERIC | PAGE_SIZE_4MB;
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i_tbl[i_i].addr = addr;
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i_tbl[i_i++].data = SDRAM_IGENERIC | PAGE_SIZE_4MB;
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+#endif
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#endif
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/* Cover L1 memory. One 4M area for code and data each is enough. */
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