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@@ -240,7 +240,7 @@ static int omap_sham_hw_init(struct omap_sham_dev *dd)
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{
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clk_enable(dd->iclk);
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- if (!(dd->flags & BIT(FLAGS_INIT))) {
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+ if (!test_bit(FLAGS_INIT, &dd->flags)) {
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omap_sham_write_mask(dd, SHA_REG_MASK,
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SHA_REG_MASK_SOFTRESET, SHA_REG_MASK_SOFTRESET);
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@@ -248,7 +248,7 @@ static int omap_sham_hw_init(struct omap_sham_dev *dd)
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SHA_REG_SYSSTATUS_RESETDONE))
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return -ETIMEDOUT;
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- dd->flags |= BIT(FLAGS_INIT);
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+ set_bit(FLAGS_INIT, &dd->flags);
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dd->err = 0;
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}
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@@ -303,7 +303,7 @@ static int omap_sham_xmit_cpu(struct omap_sham_dev *dd, const u8 *buf,
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return -ETIMEDOUT;
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if (final)
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- ctx->flags |= BIT(FLAGS_FINAL); /* catch last interrupt */
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+ set_bit(FLAGS_FINAL, &ctx->flags); /* catch last interrupt */
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len32 = DIV_ROUND_UP(length, sizeof(u32));
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@@ -336,9 +336,9 @@ static int omap_sham_xmit_dma(struct omap_sham_dev *dd, dma_addr_t dma_addr,
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ctx->digcnt += length;
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if (final)
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- ctx->flags |= BIT(FLAGS_FINAL); /* catch last interrupt */
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+ set_bit(FLAGS_FINAL, &ctx->flags); /* catch last interrupt */
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- dd->flags |= BIT(FLAGS_DMA_ACTIVE);
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+ set_bit(FLAGS_DMA_ACTIVE, &dd->flags);
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omap_start_dma(dd->dma_lch);
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@@ -642,7 +642,7 @@ static void omap_sham_finish_req(struct ahash_request *req, int err)
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if (!err) {
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omap_sham_copy_hash(req, 1);
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- if (ctx->flags & BIT(FLAGS_FINAL))
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+ if (test_bit(FLAGS_FINAL, &ctx->flags))
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err = omap_sham_finish(req);
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} else {
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ctx->flags |= BIT(FLAGS_ERROR);
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@@ -666,14 +666,14 @@ static int omap_sham_handle_queue(struct omap_sham_dev *dd,
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spin_lock_irqsave(&dd->lock, flags);
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if (req)
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ret = ahash_enqueue_request(&dd->queue, req);
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- if (dd->flags & BIT(FLAGS_BUSY)) {
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+ if (test_bit(FLAGS_BUSY, &dd->flags)) {
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spin_unlock_irqrestore(&dd->lock, flags);
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return ret;
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}
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backlog = crypto_get_backlog(&dd->queue);
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async_req = crypto_dequeue_request(&dd->queue);
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if (async_req)
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- dd->flags |= BIT(FLAGS_BUSY);
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+ set_bit(FLAGS_BUSY, &dd->flags);
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spin_unlock_irqrestore(&dd->lock, flags);
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if (!async_req)
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@@ -1037,13 +1037,10 @@ static void omap_sham_done_task(unsigned long data)
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struct omap_sham_reqctx *ctx = ahash_request_ctx(req);
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int ready = 0, err = 0;
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- if (ctx->flags & BIT(FLAGS_OUTPUT_READY)) {
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- ctx->flags &= ~BIT(FLAGS_OUTPUT_READY);
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+ if (test_and_clear_bit(FLAGS_OUTPUT_READY, &ctx->flags))
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ready = 1;
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- }
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- if (dd->flags & BIT(FLAGS_DMA_ACTIVE)) {
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- dd->flags &= ~BIT(FLAGS_DMA_ACTIVE);
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+ if (test_and_clear_bit(FLAGS_DMA_ACTIVE, &dd->flags)) {
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omap_sham_update_dma_stop(dd);
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if (!dd->err)
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err = omap_sham_update_dma_start(dd);
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@@ -1077,7 +1074,7 @@ static irqreturn_t omap_sham_irq(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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- if (unlikely(ctx->flags & BIT(FLAGS_FINAL)))
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+ if (unlikely(test_bit(FLAGS_FINAL, &ctx->flags)))
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/* final -> allow device to go to power-saving mode */
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omap_sham_write_mask(dd, SHA_REG_CTRL, 0, SHA_REG_CTRL_LENGTH);
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@@ -1085,7 +1082,7 @@ static irqreturn_t omap_sham_irq(int irq, void *dev_id)
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SHA_REG_CTRL_OUTPUT_READY);
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omap_sham_read(dd, SHA_REG_CTRL);
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- ctx->flags |= BIT(FLAGS_OUTPUT_READY);
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+ set_bit(FLAGS_OUTPUT_READY, &ctx->flags);
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dd->err = 0;
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tasklet_schedule(&dd->done_task);
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@@ -1099,7 +1096,7 @@ static void omap_sham_dma_callback(int lch, u16 ch_status, void *data)
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if (ch_status != OMAP_DMA_BLOCK_IRQ) {
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pr_err("omap-sham DMA error status: 0x%hx\n", ch_status);
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dd->err = -EIO;
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- dd->flags &= ~BIT(FLAGS_INIT); /* request to re-initialize */
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+ clear_bit(FLAGS_INIT, &dd->flags);/* request to re-initialize */
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}
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tasklet_schedule(&dd->done_task);
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